Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (119 commits)
  MIPS: Delete unused function add_temporary_entry.
  MIPS: Set default pci cache line size.
  MIPS: Flush huge TLB
  MIPS: Octeon: Remove SYS_SUPPORTS_HIGHMEM.
  MIPS: Octeon: Add support for OCTEON II PCIe
  MIPS: Octeon: Update PCI Latency timer and enable more error reporting.
  MIPS: Alchemy: Update cpu-feature-overrides
  MIPS: Alchemy: db1200: Improve PB1200 detection.
  MIPS: Alchemy: merge Au1000 and Au1300-style IRQ controller code.
  MIPS: Alchemy: chain IRQ controllers to MIPS IRQ controller
  MIPS: Alchemy: irq: register pm at irq init time
  MIPS: Alchemy: Touchscreen support on DB1100
  MIPS: Alchemy: Hook up IrDA on DB1000/DB1100
  net/irda: convert au1k_ir to platform driver.
  MIPS: Alchemy: remove unused board headers
  MTD: nand: make au1550nd.c a platform_driver
  MIPS: Netlogic: Mark Netlogic chips as SMT capable
  MIPS: Netlogic: Add support for XLP 3XX cores
  MIPS: Netlogic: Merge some of XLR/XLP wakup code
  MIPS: Netlogic: Add default XLP config.
  ...

Fix up trivial conflicts in arch/mips/kernel/{perf_event_mipsxx.c,
traps.c} and drivers/tty/serial/Makefile

1 files changed, 5 insertions, 5 deletions

diff --git a/arch/mips/sgi-ip22/ip22-mc.c b/arch/mips/sgi-ip22/ip22-mc.c
index d22262ee6853..75ada8a9713b 100644
--- a/arch/mips/sgi-ip22/ip22-mc.c
+++ b/arch/mips/sgi-ip22/ip22-mc.c
@@ -139,11 +139,11 @@ void __init sgimc_init(void)
          *         zero.
          */
         /* don't touch parity settings for IP28 */
-#ifndef CONFIG_SGI_IP28
         tmp = sgimc->cpuctrl0;
-        tmp |= (SGIMC_CCTRL0_EPERRGIO | SGIMC_CCTRL0_EPERRMEM |
-                SGIMC_CCTRL0_R4KNOCHKPARR);
+#ifndef CONFIG_SGI_IP28
+        tmp |= SGIMC_CCTRL0_EPERRGIO | SGIMC_CCTRL0_EPERRMEM;
 #endif
+        tmp |= SGIMC_CCTRL0_R4KNOCHKPARR;
         sgimc->cpuctrl0 = tmp;
 
         /* Step 3: Setup the MC write buffer depth, this is controlled
@@ -178,7 +178,8 @@ void __init sgimc_init(void)
          */
 
         /* First the basic invariants across all GIO64 implementations. */
-        tmp = SGIMC_GIOPAR_HPC64;       /* All 1st HPC's interface at 64bits */
+        tmp = sgimc->giopar & SGIMC_GIOPAR_GFX64; /* keep gfx 64bit settings */
+        tmp |= SGIMC_GIOPAR_HPC64;      /* All 1st HPC's interface at 64bits */
         tmp |= SGIMC_GIOPAR_ONEBUS;     /* Only one physical GIO bus exists */
 
         if (ip22_is_fullhouse()) {
@@ -193,7 +194,6 @@ void __init sgimc_init(void)
                         tmp |= SGIMC_GIOPAR_PLINEEXP0;  /* exp[01] pipelined */
                         tmp |= SGIMC_GIOPAR_PLINEEXP1;
                         tmp |= SGIMC_GIOPAR_MASTEREISA; /* EISA masters */
-                        tmp |= SGIMC_GIOPAR_GFX64;      /* GFX at 64 bits */
                 }
         } else {
                 /* Guiness specific settings. */