diff options
author | John Crispin <blogic@openwrt.org> | 2013-03-21 12:47:07 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2013-05-07 19:19:10 -0400 |
commit | da5b4cfa541b5597ea9b6e8273289e4bf89141f4 (patch) | |
tree | e83ba470153b2ddfd5d449900601391eae69ec70 /arch/mips/ralink | |
parent | be797c2d331719a2b93b4e97b0d4127e74f0a1c0 (diff) |
DT: MIPS: ralink: clean up RT3050 dtsi and dts file
* remove nodes for cores whose drivers are not upstream yet
* add compat string for an additional soc
* fix a whitespace error
Signed-off-by: John Crispin <blogic@openwrt.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Patchwork: http://patchwork.linux-mips.org/patch/5186/
Diffstat (limited to 'arch/mips/ralink')
-rw-r--r-- | arch/mips/ralink/dts/rt3050.dtsi | 52 | ||||
-rw-r--r-- | arch/mips/ralink/dts/rt3052_eval.dts | 10 |
2 files changed, 4 insertions, 58 deletions
diff --git a/arch/mips/ralink/dts/rt3050.dtsi b/arch/mips/ralink/dts/rt3050.dtsi index 069d0660e1dd..ef7da1e227e6 100644 --- a/arch/mips/ralink/dts/rt3050.dtsi +++ b/arch/mips/ralink/dts/rt3050.dtsi | |||
@@ -1,7 +1,7 @@ | |||
1 | / { | 1 | / { |
2 | #address-cells = <1>; | 2 | #address-cells = <1>; |
3 | #size-cells = <1>; | 3 | #size-cells = <1>; |
4 | compatible = "ralink,rt3050-soc", "ralink,rt3052-soc"; | 4 | compatible = "ralink,rt3050-soc", "ralink,rt3052-soc", "ralink,rt3350-soc"; |
5 | 5 | ||
6 | cpus { | 6 | cpus { |
7 | cpu@0 { | 7 | cpu@0 { |
@@ -9,10 +9,6 @@ | |||
9 | }; | 9 | }; |
10 | }; | 10 | }; |
11 | 11 | ||
12 | chosen { | ||
13 | bootargs = "console=ttyS0,57600 init=/init"; | ||
14 | }; | ||
15 | |||
16 | cpuintc: cpuintc@0 { | 12 | cpuintc: cpuintc@0 { |
17 | #address-cells = <0>; | 13 | #address-cells = <0>; |
18 | #interrupt-cells = <1>; | 14 | #interrupt-cells = <1>; |
@@ -23,7 +19,7 @@ | |||
23 | palmbus@10000000 { | 19 | palmbus@10000000 { |
24 | compatible = "palmbus"; | 20 | compatible = "palmbus"; |
25 | reg = <0x10000000 0x200000>; | 21 | reg = <0x10000000 0x200000>; |
26 | ranges = <0x0 0x10000000 0x1FFFFF>; | 22 | ranges = <0x0 0x10000000 0x1FFFFF>; |
27 | 23 | ||
28 | #address-cells = <1>; | 24 | #address-cells = <1>; |
29 | #size-cells = <1>; | 25 | #size-cells = <1>; |
@@ -33,11 +29,6 @@ | |||
33 | reg = <0x0 0x100>; | 29 | reg = <0x0 0x100>; |
34 | }; | 30 | }; |
35 | 31 | ||
36 | timer@100 { | ||
37 | compatible = "ralink,rt3052-wdt", "ralink,rt2880-wdt"; | ||
38 | reg = <0x100 0x100>; | ||
39 | }; | ||
40 | |||
41 | intc: intc@200 { | 32 | intc: intc@200 { |
42 | compatible = "ralink,rt3052-intc", "ralink,rt2880-intc"; | 33 | compatible = "ralink,rt3052-intc", "ralink,rt2880-intc"; |
43 | reg = <0x200 0x100>; | 34 | reg = <0x200 0x100>; |
@@ -54,45 +45,6 @@ | |||
54 | reg = <0x300 0x100>; | 45 | reg = <0x300 0x100>; |
55 | }; | 46 | }; |
56 | 47 | ||
57 | gpio0: gpio@600 { | ||
58 | compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio"; | ||
59 | reg = <0x600 0x34>; | ||
60 | |||
61 | gpio-controller; | ||
62 | #gpio-cells = <2>; | ||
63 | |||
64 | ralink,ngpio = <24>; | ||
65 | ralink,regs = [ 00 04 08 0c | ||
66 | 20 24 28 2c | ||
67 | 30 34 ]; | ||
68 | }; | ||
69 | |||
70 | gpio1: gpio@638 { | ||
71 | compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio"; | ||
72 | reg = <0x638 0x24>; | ||
73 | |||
74 | gpio-controller; | ||
75 | #gpio-cells = <2>; | ||
76 | |||
77 | ralink,ngpio = <16>; | ||
78 | ralink,regs = [ 00 04 08 0c | ||
79 | 10 14 18 1c | ||
80 | 20 24 ]; | ||
81 | }; | ||
82 | |||
83 | gpio2: gpio@660 { | ||
84 | compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio"; | ||
85 | reg = <0x660 0x24>; | ||
86 | |||
87 | gpio-controller; | ||
88 | #gpio-cells = <2>; | ||
89 | |||
90 | ralink,ngpio = <12>; | ||
91 | ralink,regs = [ 00 04 08 0c | ||
92 | 10 14 18 1c | ||
93 | 20 24 ]; | ||
94 | }; | ||
95 | |||
96 | uartlite@c00 { | 48 | uartlite@c00 { |
97 | compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a"; | 49 | compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a"; |
98 | reg = <0xc00 0x100>; | 50 | reg = <0xc00 0x100>; |
diff --git a/arch/mips/ralink/dts/rt3052_eval.dts b/arch/mips/ralink/dts/rt3052_eval.dts index 148a590bc419..df17f5fb999c 100644 --- a/arch/mips/ralink/dts/rt3052_eval.dts +++ b/arch/mips/ralink/dts/rt3052_eval.dts | |||
@@ -3,8 +3,6 @@ | |||
3 | /include/ "rt3050.dtsi" | 3 | /include/ "rt3050.dtsi" |
4 | 4 | ||
5 | / { | 5 | / { |
6 | #address-cells = <1>; | ||
7 | #size-cells = <1>; | ||
8 | compatible = "ralink,rt3052-eval-board", "ralink,rt3052-soc"; | 6 | compatible = "ralink,rt3052-eval-board", "ralink,rt3052-soc"; |
9 | model = "Ralink RT3052 evaluation board"; | 7 | model = "Ralink RT3052 evaluation board"; |
10 | 8 | ||
@@ -12,12 +10,8 @@ | |||
12 | reg = <0x0 0x2000000>; | 10 | reg = <0x0 0x2000000>; |
13 | }; | 11 | }; |
14 | 12 | ||
15 | palmbus@10000000 { | 13 | chosen { |
16 | sysc@0 { | 14 | bootargs = "console=ttyS0,57600"; |
17 | ralink,pinmmux = "uartlite", "spi"; | ||
18 | ralink,uartmux = "gpio"; | ||
19 | ralink,wdtmux = <0>; | ||
20 | }; | ||
21 | }; | 15 | }; |
22 | 16 | ||
23 | cfi@1f000000 { | 17 | cfi@1f000000 { |