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authorJohn Crispin <blogic@openwrt.org>2014-08-04 03:52:22 -0400
committerRalf Baechle <ralf@linux-mips.org>2014-11-24 01:45:20 -0500
commitf2a8bd2e924191293984a4b05e49589260a7accf (patch)
treefc841b843d365309489655c467849505c4c260bb /arch/mips/ralink
parenta8b6204761dba0cbf7b859b4f8d3dd52624b4100 (diff)
MIPS: ralink: add rt2880 wmac clock
Register the wireleass mac clock on rt2880. This is required by the wifi driver. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8006/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/ralink')
-rw-r--r--arch/mips/ralink/rt288x.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/ralink/rt288x.c b/arch/mips/ralink/rt288x.c
index f87de1ab2198..90e89349bd18 100644
--- a/arch/mips/ralink/rt288x.c
+++ b/arch/mips/ralink/rt288x.c
@@ -76,7 +76,7 @@ struct ralink_pinmux rt_gpio_pinmux = {
76 76
77void __init ralink_clk_init(void) 77void __init ralink_clk_init(void)
78{ 78{
79 unsigned long cpu_rate; 79 unsigned long cpu_rate, wmac_rate = 40000000;
80 u32 t = rt_sysc_r32(SYSC_REG_SYSTEM_CONFIG); 80 u32 t = rt_sysc_r32(SYSC_REG_SYSTEM_CONFIG);
81 t = ((t >> SYSTEM_CONFIG_CPUCLK_SHIFT) & SYSTEM_CONFIG_CPUCLK_MASK); 81 t = ((t >> SYSTEM_CONFIG_CPUCLK_SHIFT) & SYSTEM_CONFIG_CPUCLK_MASK);
82 82
@@ -101,6 +101,7 @@ void __init ralink_clk_init(void)
101 ralink_clk_add("300500.uart", cpu_rate / 2); 101 ralink_clk_add("300500.uart", cpu_rate / 2);
102 ralink_clk_add("300c00.uartlite", cpu_rate / 2); 102 ralink_clk_add("300c00.uartlite", cpu_rate / 2);
103 ralink_clk_add("400000.ethernet", cpu_rate / 2); 103 ralink_clk_add("400000.ethernet", cpu_rate / 2);
104 ralink_clk_add("480000.wmac", wmac_rate);
104} 105}
105 106
106void __init ralink_of_remap(void) 107void __init ralink_of_remap(void)