aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/ralink
diff options
context:
space:
mode:
authorJohn Crispin <blogic@openwrt.org>2013-04-12 06:45:27 -0400
committerRalf Baechle <ralf@linux-mips.org>2013-05-07 19:19:09 -0400
commiteb63875c2821cf125f133fa3292e7591dca7c7d5 (patch)
tree4b150a680cd0fbcbc17a9fff037536d340ae382a /arch/mips/ralink
parent946fda6f2a980d9964206191ec121774800eb030 (diff)
MIPS: ralink: add uart mask to struct ralink_pinmux
Add a field for the uart muxing mask and set it inside the rt305x setup code. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5744/
Diffstat (limited to 'arch/mips/ralink')
-rw-r--r--arch/mips/ralink/common.h1
-rw-r--r--arch/mips/ralink/rt305x.c5
2 files changed, 4 insertions, 2 deletions
diff --git a/arch/mips/ralink/common.h b/arch/mips/ralink/common.h
index bebd14930bd9..299119b294ca 100644
--- a/arch/mips/ralink/common.h
+++ b/arch/mips/ralink/common.h
@@ -22,6 +22,7 @@ struct ralink_pinmux {
22 struct ralink_pinmux_grp *mode; 22 struct ralink_pinmux_grp *mode;
23 struct ralink_pinmux_grp *uart; 23 struct ralink_pinmux_grp *uart;
24 int uart_shift; 24 int uart_shift;
25 u32 uart_mask;
25 void (*wdt_reset)(void); 26 void (*wdt_reset)(void);
26 struct ralink_pinmux_grp *pci; 27 struct ralink_pinmux_grp *pci;
27 int pci_shift; 28 int pci_shift;
diff --git a/arch/mips/ralink/rt305x.c b/arch/mips/ralink/rt305x.c
index 5b42078b7341..6aa3cb1a8fc5 100644
--- a/arch/mips/ralink/rt305x.c
+++ b/arch/mips/ralink/rt305x.c
@@ -91,12 +91,12 @@ static struct ralink_pinmux_grp uart_mux[] = {
91 .name = "gpio uartf", 91 .name = "gpio uartf",
92 .mask = RT305X_GPIO_MODE_GPIO_UARTF, 92 .mask = RT305X_GPIO_MODE_GPIO_UARTF,
93 .gpio_first = RT305X_GPIO_7, 93 .gpio_first = RT305X_GPIO_7,
94 .gpio_last = RT305X_GPIO_14, 94 .gpio_last = RT305X_GPIO_10,
95 }, { 95 }, {
96 .name = "gpio i2s", 96 .name = "gpio i2s",
97 .mask = RT305X_GPIO_MODE_GPIO_I2S, 97 .mask = RT305X_GPIO_MODE_GPIO_I2S,
98 .gpio_first = RT305X_GPIO_7, 98 .gpio_first = RT305X_GPIO_7,
99 .gpio_last = RT305X_GPIO_14, 99 .gpio_last = RT305X_GPIO_10,
100 }, { 100 }, {
101 .name = "gpio", 101 .name = "gpio",
102 .mask = RT305X_GPIO_MODE_GPIO, 102 .mask = RT305X_GPIO_MODE_GPIO,
@@ -118,6 +118,7 @@ struct ralink_pinmux rt_gpio_pinmux = {
118 .mode = mode_mux, 118 .mode = mode_mux,
119 .uart = uart_mux, 119 .uart = uart_mux,
120 .uart_shift = RT305X_GPIO_MODE_UART0_SHIFT, 120 .uart_shift = RT305X_GPIO_MODE_UART0_SHIFT,
121 .uart_mask = RT305X_GPIO_MODE_UART0_MASK,
121 .wdt_reset = rt305x_wdt_reset, 122 .wdt_reset = rt305x_wdt_reset,
122}; 123};
123 124