diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 18:46:09 -0400 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 18:46:09 -0400 |
| commit | 7bcf7717b6a047c272410d0cd00213185fe6b99d (patch) | |
| tree | 81c5d6bbc2130815713e22bb5408ea80b6e1c499 /arch/mips/qemu/q-setup.c | |
| parent | 91a2fcc88634663e9e13dcdfad0e4a860e64aeee (diff) | |
[MIPS] Implement clockevents for R4000-style cp0 count/compare interrupt
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/qemu/q-setup.c')
| -rw-r--r-- | arch/mips/qemu/q-setup.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/mips/qemu/q-setup.c b/arch/mips/qemu/q-setup.c index 841394336f00..89a207650ce9 100644 --- a/arch/mips/qemu/q-setup.c +++ b/arch/mips/qemu/q-setup.c | |||
| @@ -17,7 +17,6 @@ void __init plat_timer_setup(struct irqaction *irq) | |||
| 17 | outb_p(0x34,0x43); /* binary, mode 2, LSB/MSB, ch 0 */ | 17 | outb_p(0x34,0x43); /* binary, mode 2, LSB/MSB, ch 0 */ |
| 18 | outb_p(LATCH & 0xff , 0x40); /* LSB */ | 18 | outb_p(LATCH & 0xff , 0x40); /* LSB */ |
| 19 | outb(LATCH >> 8 , 0x40); /* MSB */ | 19 | outb(LATCH >> 8 , 0x40); /* MSB */ |
| 20 | setup_irq(0, irq); | ||
| 21 | } | 20 | } |
| 22 | 21 | ||
| 23 | void __init plat_mem_setup(void) | 22 | void __init plat_mem_setup(void) |