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authorDavid VomLehn <dvomlehn@cisco.com>2009-08-30 20:15:11 -0400
committerRalf Baechle <ralf@linux-mips.org>2009-12-16 20:57:17 -0500
commita3a0f8c8ed2e2470f4dcd6da95020d41fed84747 (patch)
treef91ffa7ce5752c6debb79981f206865057413e9c /arch/mips/powertv
parent13e79b462212ac46a046932af06117eaf7a9f77b (diff)
MIPS: PowerTV: Base files for Cisco PowerTV platform
Add the Cisco Powertv cable settop box to the MIPS tree. This platform is based on a MIPS 24Kc processor with various devices integrated on the same ASIC. There are multiple models of this box, with differing configuration but the same kernel runs across the product line. Signed-off-by: David VomLehn <dvomlehn@cisco.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/132/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/powertv')
-rw-r--r--arch/mips/powertv/Kconfig21
-rw-r--r--arch/mips/powertv/Makefile28
-rw-r--r--arch/mips/powertv/asic/Kconfig28
-rw-r--r--arch/mips/powertv/asic/Makefile23
-rw-r--r--arch/mips/powertv/asic/asic-calliope.c98
-rw-r--r--arch/mips/powertv/asic/asic-cronus.c98
-rw-r--r--arch/mips/powertv/asic/asic-zeus.c98
-rw-r--r--arch/mips/powertv/asic/asic_devices.c787
-rw-r--r--arch/mips/powertv/asic/asic_int.c125
-rw-r--r--arch/mips/powertv/asic/irq_asic.c116
-rw-r--r--arch/mips/powertv/asic/prealloc-calliope.c620
-rw-r--r--arch/mips/powertv/asic/prealloc-cronus.c608
-rw-r--r--arch/mips/powertv/asic/prealloc-cronuslite.c290
-rw-r--r--arch/mips/powertv/asic/prealloc-zeus.c459
-rw-r--r--arch/mips/powertv/cmdline.c52
-rw-r--r--arch/mips/powertv/init.c128
-rw-r--r--arch/mips/powertv/init.h28
-rw-r--r--arch/mips/powertv/memory.c186
-rw-r--r--arch/mips/powertv/pci/Makefile21
-rw-r--r--arch/mips/powertv/pci/fixup-powertv.c36
-rw-r--r--arch/mips/powertv/pci/powertv-pci.h31
-rw-r--r--arch/mips/powertv/powertv-clock.h26
-rw-r--r--arch/mips/powertv/powertv_setup.c351
-rw-r--r--arch/mips/powertv/reset.c65
-rw-r--r--arch/mips/powertv/reset.h26
-rw-r--r--arch/mips/powertv/time.c37
26 files changed, 4386 insertions, 0 deletions
diff --git a/arch/mips/powertv/Kconfig b/arch/mips/powertv/Kconfig
new file mode 100644
index 000000000000..ff0e7e3e6954
--- /dev/null
+++ b/arch/mips/powertv/Kconfig
@@ -0,0 +1,21 @@
1source "arch/mips/powertv/asic/Kconfig"
2
3config BOOTLOADER_DRIVER
4 bool "PowerTV Bootloader Driver Support"
5 default n
6 depends on POWERTV
7 help
8 Use this option if you want to load bootloader driver.
9
10config BOOTLOADER_FAMILY
11 string "POWERTV Bootloader Family string"
12 default "85"
13 depends on POWERTV && !BOOTLOADER_DRIVER
14 help
15 This value should be specified when the bootloader driver is disabled
16 and must be exactly two characters long. Families supported are:
17 R1 - RNG-100 R2 - RNG-200
18 A1 - Class A B1 - Class B
19 E1 - Class E F1 - Class F
20 44 - 45xx 46 - 46xx
21 85 - 85xx 86 - 86xx
diff --git a/arch/mips/powertv/Makefile b/arch/mips/powertv/Makefile
new file mode 100644
index 000000000000..2c516718affe
--- /dev/null
+++ b/arch/mips/powertv/Makefile
@@ -0,0 +1,28 @@
1#
2# Carsten Langgaard, carstenl@mips.com
3# Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
4#
5# Carsten Langgaard, carstenl@mips.com
6# Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
7# Portions copyright (C) 2009 Cisco Systems, Inc.
8#
9# This program is free software; you can distribute it and/or modify it
10# under the terms of the GNU General Public License (Version 2) as
11# published by the Free Software Foundation.
12#
13# This program is distributed in the hope it will be useful, but WITHOUT
14# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16# for more details.
17#
18# You should have received a copy of the GNU General Public License along
19# with this program; if not, write to the Free Software Foundation, Inc.,
20# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
21#
22# Makefile for the Cisco PowerTV-specific kernel interface routines
23# under Linux.
24#
25
26obj-y += cmdline.o init.o memory.o reset.o time.o powertv_setup.o asic/ pci/
27
28EXTRA_CFLAGS += -Wall -Werror
diff --git a/arch/mips/powertv/asic/Kconfig b/arch/mips/powertv/asic/Kconfig
new file mode 100644
index 000000000000..2016bfe94d66
--- /dev/null
+++ b/arch/mips/powertv/asic/Kconfig
@@ -0,0 +1,28 @@
1config MIN_RUNTIME_RESOURCES
2 bool "Support for minimum runtime resources"
3 default n
4 depends on POWERTV
5 help
6 Enables support for minimizing the number of (SA asic) runtime
7 resources that are preallocated by the kernel.
8
9config MIN_RUNTIME_DOCSIS
10 bool "Support for minimum DOCSIS resource"
11 default y
12 depends on MIN_RUNTIME_RESOURCES
13 help
14 Enables support for the preallocated DOCSIS resource.
15
16config MIN_RUNTIME_PMEM
17 bool "Support for minimum PMEM resource"
18 default y
19 depends on MIN_RUNTIME_RESOURCES
20 help
21 Enables support for the preallocated Memory resource.
22
23config MIN_RUNTIME_TFTP
24 bool "Support for minimum TFTP resource"
25 default y
26 depends on MIN_RUNTIME_RESOURCES
27 help
28 Enables support for the preallocated TFTP resource.
diff --git a/arch/mips/powertv/asic/Makefile b/arch/mips/powertv/asic/Makefile
new file mode 100644
index 000000000000..bebfdcff0443
--- /dev/null
+++ b/arch/mips/powertv/asic/Makefile
@@ -0,0 +1,23 @@
1#
2# Copyright (C) 2009 Scientific-Atlanta, Inc.
3#
4# This program is free software; you can redistribute it and/or modify
5# it under the terms of the GNU General Public License as published by
6# the Free Software Foundation; either version 2 of the License, or
7# (at your option) any later version.
8#
9# This program is distributed in the hope that it will be useful,
10# but WITHOUT ANY WARRANTY; without even the implied warranty of
11# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12# GNU General Public License for more details.
13#
14# You should have received a copy of the GNU General Public License
15# along with this program; if not, write to the Free Software
16# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
17#
18
19obj-y += asic-calliope.o asic-cronus.o asic-zeus.o asic_devices.o asic_int.o \
20 irq_asic.o prealloc-calliope.o prealloc-cronus.o \
21 prealloc-cronuslite.o prealloc-zeus.o
22
23EXTRA_CFLAGS += -Wall -Werror
diff --git a/arch/mips/powertv/asic/asic-calliope.c b/arch/mips/powertv/asic/asic-calliope.c
new file mode 100644
index 000000000000..03d3884c6270
--- /dev/null
+++ b/arch/mips/powertv/asic/asic-calliope.c
@@ -0,0 +1,98 @@
1/*
2 * Locations of devices in the Calliope ASIC.
3 *
4 * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 *
20 * Author: Ken Eppinett
21 * David Schleef <ds@schleef.org>
22 *
23 * Description: Defines the platform resources for the SA settop.
24 */
25
26#include <asm/mach-powertv/asic.h>
27
28const struct register_map calliope_register_map = {
29 .eic_slow0_strt_add = 0x800000,
30 .eic_cfg_bits = 0x800038,
31 .eic_ready_status = 0x80004c,
32
33 .chipver3 = 0xA00800,
34 .chipver2 = 0xA00804,
35 .chipver1 = 0xA00808,
36 .chipver0 = 0xA0080c,
37
38 /* The registers of IRBlaster */
39 .uart1_intstat = 0xA01800,
40 .uart1_inten = 0xA01804,
41 .uart1_config1 = 0xA01808,
42 .uart1_config2 = 0xA0180C,
43 .uart1_divisorhi = 0xA01810,
44 .uart1_divisorlo = 0xA01814,
45 .uart1_data = 0xA01818,
46 .uart1_status = 0xA0181C,
47
48 .int_stat_3 = 0xA02800,
49 .int_stat_2 = 0xA02804,
50 .int_stat_1 = 0xA02808,
51 .int_stat_0 = 0xA0280c,
52 .int_config = 0xA02810,
53 .int_int_scan = 0xA02818,
54 .ien_int_3 = 0xA02830,
55 .ien_int_2 = 0xA02834,
56 .ien_int_1 = 0xA02838,
57 .ien_int_0 = 0xA0283c,
58 .int_level_3_3 = 0xA02880,
59 .int_level_3_2 = 0xA02884,
60 .int_level_3_1 = 0xA02888,
61 .int_level_3_0 = 0xA0288c,
62 .int_level_2_3 = 0xA02890,
63 .int_level_2_2 = 0xA02894,
64 .int_level_2_1 = 0xA02898,
65 .int_level_2_0 = 0xA0289c,
66 .int_level_1_3 = 0xA028a0,
67 .int_level_1_2 = 0xA028a4,
68 .int_level_1_1 = 0xA028a8,
69 .int_level_1_0 = 0xA028ac,
70 .int_level_0_3 = 0xA028b0,
71 .int_level_0_2 = 0xA028b4,
72 .int_level_0_1 = 0xA028b8,
73 .int_level_0_0 = 0xA028bc,
74 .int_docsis_en = 0xA028F4,
75
76 .mips_pll_setup = 0x980000,
77 .usb_fs = 0x980030, /* -default 72800028- */
78 .test_bus = 0x9800CC,
79 .crt_spare = 0x9800d4,
80 .usb2_ohci_int_mask = 0x9A000c,
81 .usb2_strap = 0x9A0014,
82 .ehci_hcapbase = 0x9BFE00,
83 .ohci_hc_revision = 0x9BFC00,
84 .bcm1_bs_lmi_steer = 0x9E0004,
85 .usb2_control = 0x9E0054,
86 .usb2_stbus_obc = 0x9BFF00,
87 .usb2_stbus_mess_size = 0x9BFF04,
88 .usb2_stbus_chunk_size = 0x9BFF08,
89
90 .pcie_regs = 0x000000, /* -doesn't exist- */
91 .tim_ch = 0xA02C10,
92 .tim_cl = 0xA02C14,
93 .gpio_dout = 0xA02c20,
94 .gpio_din = 0xA02c24,
95 .gpio_dir = 0xA02c2C,
96 .watchdog = 0xA02c30,
97 .front_panel = 0x000000, /* -not used- */
98};
diff --git a/arch/mips/powertv/asic/asic-cronus.c b/arch/mips/powertv/asic/asic-cronus.c
new file mode 100644
index 000000000000..5f4589c9f83d
--- /dev/null
+++ b/arch/mips/powertv/asic/asic-cronus.c
@@ -0,0 +1,98 @@
1/*
2 * Locations of devices in the Cronus ASIC
3 *
4 * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 *
20 * Author: Ken Eppinett
21 * David Schleef <ds@schleef.org>
22 *
23 * Description: Defines the platform resources for the SA settop.
24 */
25
26#include <asm/mach-powertv/asic.h>
27
28const struct register_map cronus_register_map = {
29 .eic_slow0_strt_add = 0x000000,
30 .eic_cfg_bits = 0x000038,
31 .eic_ready_status = 0x00004C,
32
33 .chipver3 = 0x2A0800,
34 .chipver2 = 0x2A0804,
35 .chipver1 = 0x2A0808,
36 .chipver0 = 0x2A080C,
37
38 /* The registers of IRBlaster */
39 .uart1_intstat = 0x2A1800,
40 .uart1_inten = 0x2A1804,
41 .uart1_config1 = 0x2A1808,
42 .uart1_config2 = 0x2A180C,
43 .uart1_divisorhi = 0x2A1810,
44 .uart1_divisorlo = 0x2A1814,
45 .uart1_data = 0x2A1818,
46 .uart1_status = 0x2A181C,
47
48 .int_stat_3 = 0x2A2800,
49 .int_stat_2 = 0x2A2804,
50 .int_stat_1 = 0x2A2808,
51 .int_stat_0 = 0x2A280C,
52 .int_config = 0x2A2810,
53 .int_int_scan = 0x2A2818,
54 .ien_int_3 = 0x2A2830,
55 .ien_int_2 = 0x2A2834,
56 .ien_int_1 = 0x2A2838,
57 .ien_int_0 = 0x2A283C,
58 .int_level_3_3 = 0x2A2880,
59 .int_level_3_2 = 0x2A2884,
60 .int_level_3_1 = 0x2A2888,
61 .int_level_3_0 = 0x2A288C,
62 .int_level_2_3 = 0x2A2890,
63 .int_level_2_2 = 0x2A2894,
64 .int_level_2_1 = 0x2A2898,
65 .int_level_2_0 = 0x2A289C,
66 .int_level_1_3 = 0x2A28A0,
67 .int_level_1_2 = 0x2A28A4,
68 .int_level_1_1 = 0x2A28A8,
69 .int_level_1_0 = 0x2A28AC,
70 .int_level_0_3 = 0x2A28B0,
71 .int_level_0_2 = 0x2A28B4,
72 .int_level_0_1 = 0x2A28B8,
73 .int_level_0_0 = 0x2A28BC,
74 .int_docsis_en = 0x2A28F4,
75
76 .mips_pll_setup = 0x1C0000,
77 .usb_fs = 0x1C0018,
78 .test_bus = 0x1C00CC,
79 .crt_spare = 0x1c00d4,
80 .usb2_ohci_int_mask = 0x20000C,
81 .usb2_strap = 0x200014,
82 .ehci_hcapbase = 0x21FE00,
83 .ohci_hc_revision = 0x1E0000,
84 .bcm1_bs_lmi_steer = 0x2E0008,
85 .usb2_control = 0x2E004C,
86 .usb2_stbus_obc = 0x21FF00,
87 .usb2_stbus_mess_size = 0x21FF04,
88 .usb2_stbus_chunk_size = 0x21FF08,
89
90 .pcie_regs = 0x220000,
91 .tim_ch = 0x2A2C10,
92 .tim_cl = 0x2A2C14,
93 .gpio_dout = 0x2A2C20,
94 .gpio_din = 0x2A2C24,
95 .gpio_dir = 0x2A2C2C,
96 .watchdog = 0x2A2C30,
97 .front_panel = 0x2A3800,
98};
diff --git a/arch/mips/powertv/asic/asic-zeus.c b/arch/mips/powertv/asic/asic-zeus.c
new file mode 100644
index 000000000000..1469daab920e
--- /dev/null
+++ b/arch/mips/powertv/asic/asic-zeus.c
@@ -0,0 +1,98 @@
1/*
2 * Locations of devices in the Zeus ASIC
3 *
4 * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 *
20 * Author: Ken Eppinett
21 * David Schleef <ds@schleef.org>
22 *
23 * Description: Defines the platform resources for the SA settop.
24 */
25
26#include <asm/mach-powertv/asic.h>
27
28const struct register_map zeus_register_map = {
29 .eic_slow0_strt_add = 0x000000,
30 .eic_cfg_bits = 0x000038,
31 .eic_ready_status = 0x00004c,
32
33 .chipver3 = 0x280800,
34 .chipver2 = 0x280804,
35 .chipver1 = 0x280808,
36 .chipver0 = 0x28080c,
37
38 /* The registers of IRBlaster */
39 .uart1_intstat = 0x281800,
40 .uart1_inten = 0x281804,
41 .uart1_config1 = 0x281808,
42 .uart1_config2 = 0x28180C,
43 .uart1_divisorhi = 0x281810,
44 .uart1_divisorlo = 0x281814,
45 .uart1_data = 0x281818,
46 .uart1_status = 0x28181C,
47
48 .int_stat_3 = 0x282800,
49 .int_stat_2 = 0x282804,
50 .int_stat_1 = 0x282808,
51 .int_stat_0 = 0x28280c,
52 .int_config = 0x282810,
53 .int_int_scan = 0x282818,
54 .ien_int_3 = 0x282830,
55 .ien_int_2 = 0x282834,
56 .ien_int_1 = 0x282838,
57 .ien_int_0 = 0x28283c,
58 .int_level_3_3 = 0x282880,
59 .int_level_3_2 = 0x282884,
60 .int_level_3_1 = 0x282888,
61 .int_level_3_0 = 0x28288c,
62 .int_level_2_3 = 0x282890,
63 .int_level_2_2 = 0x282894,
64 .int_level_2_1 = 0x282898,
65 .int_level_2_0 = 0x28289c,
66 .int_level_1_3 = 0x2828a0,
67 .int_level_1_2 = 0x2828a4,
68 .int_level_1_1 = 0x2828a8,
69 .int_level_1_0 = 0x2828ac,
70 .int_level_0_3 = 0x2828b0,
71 .int_level_0_2 = 0x2828b4,
72 .int_level_0_1 = 0x2828b8,
73 .int_level_0_0 = 0x2828bc,
74 .int_docsis_en = 0x2828F4,
75
76 .mips_pll_setup = 0x1a0000,
77 .usb_fs = 0x1a0018,
78 .test_bus = 0x1a0238,
79 .crt_spare = 0x1a0090,
80 .usb2_ohci_int_mask = 0x1e000c,
81 .usb2_strap = 0x1e0014,
82 .ehci_hcapbase = 0x1FFE00,
83 .ohci_hc_revision = 0x1FFC00,
84 .bcm1_bs_lmi_steer = 0x2C0008,
85 .usb2_control = 0x2c01a0,
86 .usb2_stbus_obc = 0x1FFF00,
87 .usb2_stbus_mess_size = 0x1FFF04,
88 .usb2_stbus_chunk_size = 0x1FFF08,
89
90 .pcie_regs = 0x200000,
91 .tim_ch = 0x282C10,
92 .tim_cl = 0x282C14,
93 .gpio_dout = 0x282c20,
94 .gpio_din = 0x282c24,
95 .gpio_dir = 0x282c2C,
96 .watchdog = 0x282c30,
97 .front_panel = 0x283800,
98};
diff --git a/arch/mips/powertv/asic/asic_devices.c b/arch/mips/powertv/asic/asic_devices.c
new file mode 100644
index 000000000000..bae82880b6b5
--- /dev/null
+++ b/arch/mips/powertv/asic/asic_devices.c
@@ -0,0 +1,787 @@
1/*
2 * ASIC Device List Intialization
3 *
4 * Description: Defines the platform resources for the SA settop.
5 *
6 * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 *
22 * Author: Ken Eppinett
23 * David Schleef <ds@schleef.org>
24 *
25 * Description: Defines the platform resources for the SA settop.
26 *
27 * NOTE: The bootloader allocates persistent memory at an address which is
28 * 16 MiB below the end of the highest address in KSEG0. All fixed
29 * address memory reservations must avoid this region.
30 */
31
32#include <linux/device.h>
33#include <linux/kernel.h>
34#include <linux/init.h>
35#include <linux/resource.h>
36#include <linux/serial_reg.h>
37#include <linux/io.h>
38#include <linux/bootmem.h>
39#include <linux/mm.h>
40#include <linux/platform_device.h>
41#include <linux/module.h>
42#include <asm/page.h>
43#include <linux/swap.h>
44#include <linux/highmem.h>
45#include <linux/dma-mapping.h>
46
47#include <asm/mach-powertv/asic.h>
48#include <asm/mach-powertv/asic_regs.h>
49#include <asm/mach-powertv/interrupts.h>
50
51#ifdef CONFIG_BOOTLOADER_DRIVER
52#include <asm/mach-powertv/kbldr.h>
53#endif
54#include <asm/bootinfo.h>
55
56#define BOOTLDRFAMILY(byte1, byte0) (((byte1) << 8) | (byte0))
57
58/*
59 * Forward Prototypes
60 */
61static void pmem_setup_resource(void);
62
63/*
64 * Global Variables
65 */
66enum asic_type asic;
67
68unsigned int platform_features;
69unsigned int platform_family;
70const struct register_map *register_map;
71EXPORT_SYMBOL(register_map); /* Exported for testing */
72unsigned long asic_phy_base;
73unsigned long asic_base;
74EXPORT_SYMBOL(asic_base); /* Exported for testing */
75struct resource *gp_resources;
76static bool usb_configured;
77
78/*
79 * Don't recommend to use it directly, it is usually used by kernel internally.
80 * Portable code should be using interfaces such as ioremp, dma_map_single, etc.
81 */
82unsigned long phys_to_bus_offset;
83EXPORT_SYMBOL(phys_to_bus_offset);
84
85/*
86 *
87 * IO Resource Definition
88 *
89 */
90
91struct resource asic_resource = {
92 .name = "ASIC Resource",
93 .start = 0,
94 .end = ASIC_IO_SIZE,
95 .flags = IORESOURCE_MEM,
96};
97
98/*
99 *
100 * USB Host Resource Definition
101 *
102 */
103
104static struct resource ehci_resources[] = {
105 {
106 .parent = &asic_resource,
107 .start = 0,
108 .end = 0xff,
109 .flags = IORESOURCE_MEM,
110 },
111 {
112 .start = irq_usbehci,
113 .end = irq_usbehci,
114 .flags = IORESOURCE_IRQ,
115 },
116};
117
118static u64 ehci_dmamask = DMA_BIT_MASK(32);
119
120static struct platform_device ehci_device = {
121 .name = "powertv-ehci",
122 .id = 0,
123 .num_resources = 2,
124 .resource = ehci_resources,
125 .dev = {
126 .dma_mask = &ehci_dmamask,
127 .coherent_dma_mask = DMA_BIT_MASK(32),
128 },
129};
130
131static struct resource ohci_resources[] = {
132 {
133 .parent = &asic_resource,
134 .start = 0,
135 .end = 0xff,
136 .flags = IORESOURCE_MEM,
137 },
138 {
139 .start = irq_usbohci,
140 .end = irq_usbohci,
141 .flags = IORESOURCE_IRQ,
142 },
143};
144
145static u64 ohci_dmamask = DMA_BIT_MASK(32);
146
147static struct platform_device ohci_device = {
148 .name = "powertv-ohci",
149 .id = 0,
150 .num_resources = 2,
151 .resource = ohci_resources,
152 .dev = {
153 .dma_mask = &ohci_dmamask,
154 .coherent_dma_mask = DMA_BIT_MASK(32),
155 },
156};
157
158static struct platform_device *platform_devices[] = {
159 &ehci_device,
160 &ohci_device,
161};
162
163/*
164 *
165 * Platform Configuration and Device Initialization
166 *
167 */
168static void __init fs_update(int pe, int md, int sdiv, int disable_div_by_3)
169{
170 int en_prg, byp, pwr, nsb, val;
171 int sout;
172
173 sout = 1;
174 en_prg = 1;
175 byp = 0;
176 nsb = 1;
177 pwr = 1;
178
179 val = ((sdiv << 29) | (md << 24) | (pe<<8) | (sout<<3) | (byp<<2) |
180 (nsb<<1) | (disable_div_by_3<<5));
181
182 asic_write(val, usb_fs);
183 asic_write(val | (en_prg<<4), usb_fs);
184 asic_write(val | (en_prg<<4) | pwr, usb_fs);
185}
186
187/*
188 * Allow override of bootloader-specified model
189 */
190static char __initdata cmdline[COMMAND_LINE_SIZE];
191
192#define FORCEFAMILY_PARAM "forcefamily"
193
194static __init int check_forcefamily(unsigned char forced_family[2])
195{
196 const char *p;
197
198 forced_family[0] = '\0';
199 forced_family[1] = '\0';
200
201 /* Check the command line for a forcefamily directive */
202 strncpy(cmdline, arcs_cmdline, COMMAND_LINE_SIZE - 1);
203 p = strstr(cmdline, FORCEFAMILY_PARAM);
204 if (p && (p != cmdline) && (*(p - 1) != ' '))
205 p = strstr(p, " " FORCEFAMILY_PARAM "=");
206
207 if (p) {
208 p += strlen(FORCEFAMILY_PARAM "=");
209
210 if (*p == '\0' || *(p + 1) == '\0' ||
211 (*(p + 2) != '\0' && *(p + 2) != ' '))
212 pr_err(FORCEFAMILY_PARAM " must be exactly two "
213 "characters long, ignoring value\n");
214
215 else {
216 forced_family[0] = *p;
217 forced_family[1] = *(p + 1);
218 }
219 }
220
221 return 0;
222}
223
224/*
225 * platform_set_family - determine major platform family type.
226 *
227 * Returns family type; -1 if none
228 * Returns the family type; -1 if none
229 *
230 */
231static __init noinline void platform_set_family(void)
232{
233#define BOOTLDRFAMILY(byte1, byte0) (((byte1) << 8) | (byte0))
234
235 unsigned char forced_family[2];
236 unsigned short bootldr_family;
237
238 check_forcefamily(forced_family);
239
240 if (forced_family[0] != '\0' && forced_family[1] != '\0')
241 bootldr_family = BOOTLDRFAMILY(forced_family[0],
242 forced_family[1]);
243 else {
244
245#ifdef CONFIG_BOOTLOADER_DRIVER
246 bootldr_family = (unsigned short) kbldr_GetSWFamily();
247#else
248#if defined(CONFIG_BOOTLOADER_FAMILY)
249 bootldr_family = (unsigned short) BOOTLDRFAMILY(
250 CONFIG_BOOTLOADER_FAMILY[0],
251 CONFIG_BOOTLOADER_FAMILY[1]);
252#else
253#error "Unknown Bootloader Family"
254#endif
255#endif
256 }
257
258 pr_info("Bootloader Family = 0x%04X\n", bootldr_family);
259
260 switch (bootldr_family) {
261 case BOOTLDRFAMILY('R', '1'):
262 platform_family = FAMILY_1500;
263 break;
264 case BOOTLDRFAMILY('4', '4'):
265 platform_family = FAMILY_4500;
266 break;
267 case BOOTLDRFAMILY('4', '6'):
268 platform_family = FAMILY_4600;
269 break;
270 case BOOTLDRFAMILY('A', '1'):
271 platform_family = FAMILY_4600VZA;
272 break;
273 case BOOTLDRFAMILY('8', '5'):
274 platform_family = FAMILY_8500;
275 break;
276 case BOOTLDRFAMILY('R', '2'):
277 platform_family = FAMILY_8500RNG;
278 break;
279 case BOOTLDRFAMILY('8', '6'):
280 platform_family = FAMILY_8600;
281 break;
282 case BOOTLDRFAMILY('B', '1'):
283 platform_family = FAMILY_8600VZB;
284 break;
285 case BOOTLDRFAMILY('E', '1'):
286 platform_family = FAMILY_1500VZE;
287 break;
288 case BOOTLDRFAMILY('F', '1'):
289 platform_family = FAMILY_1500VZF;
290 break;
291 default:
292 platform_family = -1;
293 }
294}
295
296unsigned int platform_get_family(void)
297{
298 return platform_family;
299}
300EXPORT_SYMBOL(platform_get_family);
301
302/*
303 * \brief usb_eye_configure() for optimizing the USB eye on Calliope.
304 *
305 * \param unsigned int value saved to the register.
306 *
307 * \return none
308 *
309 */
310static void __init usb_eye_configure(unsigned int value)
311{
312 asic_write(asic_read(crt_spare) | value, crt_spare);
313}
314
315/*
316 * platform_get_asic - determine the ASIC type.
317 *
318 * \param none
319 *
320 * \return ASIC type; ASIC_UNKNOWN if none
321 *
322 */
323enum asic_type platform_get_asic(void)
324{
325 return asic;
326}
327EXPORT_SYMBOL(platform_get_asic);
328
329/*
330 * platform_configure_usb - usb configuration based on platform type.
331 * @bcm1_usb2_ctl: value for the BCM1_USB2_CTL register, which is
332 * quirky
333 */
334static void __init platform_configure_usb(void)
335{
336 u32 bcm1_usb2_ctl;
337
338 if (usb_configured)
339 return;
340
341 switch (asic) {
342 case ASIC_ZEUS:
343 fs_update(0x0000, 0x11, 0x02, 0);
344 bcm1_usb2_ctl = 0x803;
345 break;
346
347 case ASIC_CRONUS:
348 case ASIC_CRONUSLITE:
349 fs_update(0x0000, 0x11, 0x02, 0);
350 bcm1_usb2_ctl = 0x803;
351 break;
352
353 case ASIC_CALLIOPE:
354 fs_update(0x0000, 0x11, 0x02, 1);
355
356 switch (platform_family) {
357 case FAMILY_1500VZE:
358 break;
359
360 case FAMILY_1500VZF:
361 usb_eye_configure(0x003c0000);
362 break;
363
364 default:
365 usb_eye_configure(0x00300000);
366 break;
367 }
368
369 bcm1_usb2_ctl = 0x803;
370 break;
371
372 default:
373 pr_err("Unknown ASIC type: %d\n", asic);
374 break;
375 }
376
377 /* turn on USB power */
378 asic_write(0, usb2_strap);
379 /* Enable all OHCI interrupts */
380 asic_write(bcm1_usb2_ctl, usb2_control);
381 /* USB2_STBUS_OBC store32/load32 */
382 asic_write(3, usb2_stbus_obc);
383 /* USB2_STBUS_MESS_SIZE 2 packets */
384 asic_write(1, usb2_stbus_mess_size);
385 /* USB2_STBUS_CHUNK_SIZE 2 packets */
386 asic_write(1, usb2_stbus_chunk_size);
387
388 usb_configured = true;
389}
390
391/*
392 * Set up the USB EHCI interface
393 */
394void platform_configure_usb_ehci()
395{
396 platform_configure_usb();
397}
398
399/*
400 * Set up the USB OHCI interface
401 */
402void platform_configure_usb_ohci()
403{
404 platform_configure_usb();
405}
406
407/*
408 * Shut the USB EHCI interface down--currently a NOP
409 */
410void platform_unconfigure_usb_ehci()
411{
412}
413
414/*
415 * Shut the USB OHCI interface down--currently a NOP
416 */
417void platform_unconfigure_usb_ohci()
418{
419}
420
421/**
422 * configure_platform - configuration based on platform type.
423 */
424void __init configure_platform(void)
425{
426 platform_set_family();
427
428 switch (platform_family) {
429 case FAMILY_1500:
430 case FAMILY_1500VZE:
431 case FAMILY_1500VZF:
432 platform_features = FFS_CAPABLE;
433 asic = ASIC_CALLIOPE;
434 asic_phy_base = CALLIOPE_IO_BASE;
435 register_map = &calliope_register_map;
436 asic_base = (unsigned long)ioremap_nocache(asic_phy_base,
437 ASIC_IO_SIZE);
438
439 if (platform_family == FAMILY_1500VZE) {
440 gp_resources = non_dvr_vze_calliope_resources;
441 pr_info("Platform: 1500/Vz Class E - "
442 "CALLIOPE, NON_DVR_CAPABLE\n");
443 } else if (platform_family == FAMILY_1500VZF) {
444 gp_resources = non_dvr_vzf_calliope_resources;
445 pr_info("Platform: 1500/Vz Class F - "
446 "CALLIOPE, NON_DVR_CAPABLE\n");
447 } else {
448 gp_resources = non_dvr_calliope_resources;
449 pr_info("Platform: 1500/RNG100 - CALLIOPE, "
450 "NON_DVR_CAPABLE\n");
451 }
452 break;
453
454 case FAMILY_4500:
455 platform_features = FFS_CAPABLE | PCIE_CAPABLE |
456 DISPLAY_CAPABLE;
457 asic = ASIC_ZEUS;
458 asic_phy_base = ZEUS_IO_BASE;
459 register_map = &zeus_register_map;
460 asic_base = (unsigned long)ioremap_nocache(asic_phy_base,
461 ASIC_IO_SIZE);
462 gp_resources = non_dvr_zeus_resources;
463
464 pr_info("Platform: 4500 - ZEUS, NON_DVR_CAPABLE\n");
465 break;
466
467 case FAMILY_4600:
468 {
469 unsigned int chipversion = 0;
470
471 /* The settop has PCIE but it isn't used, so don't advertise
472 * it*/
473 platform_features = FFS_CAPABLE | DISPLAY_CAPABLE;
474 asic_phy_base = CRONUS_IO_BASE; /* same as Cronus */
475 register_map = &cronus_register_map; /* same as Cronus */
476 asic_base = (unsigned long)ioremap_nocache(asic_phy_base,
477 ASIC_IO_SIZE);
478 gp_resources = non_dvr_cronuslite_resources;
479
480 /* ASIC version will determine if this is a real CronusLite or
481 * Castrati(Cronus) */
482 chipversion = asic_read(chipver3) << 24;
483 chipversion |= asic_read(chipver2) << 16;
484 chipversion |= asic_read(chipver1) << 8;
485 chipversion |= asic_read(chipver0);
486
487 if ((chipversion == CRONUS_10) || (chipversion == CRONUS_11))
488 asic = ASIC_CRONUS;
489 else
490 asic = ASIC_CRONUSLITE;
491
492 pr_info("Platform: 4600 - %s, NON_DVR_CAPABLE, "
493 "chipversion=0x%08X\n",
494 (asic == ASIC_CRONUS) ? "CRONUS" : "CRONUS LITE",
495 chipversion);
496 break;
497 }
498 case FAMILY_4600VZA:
499 platform_features = FFS_CAPABLE | DISPLAY_CAPABLE;
500 asic = ASIC_CRONUS;
501 asic_phy_base = CRONUS_IO_BASE;
502 register_map = &cronus_register_map;
503 asic_base = (unsigned long)ioremap_nocache(asic_phy_base,
504 ASIC_IO_SIZE);
505 gp_resources = non_dvr_cronus_resources;
506
507 pr_info("Platform: Vz Class A - CRONUS, NON_DVR_CAPABLE\n");
508 break;
509
510 case FAMILY_8500:
511 case FAMILY_8500RNG:
512 platform_features = DVR_CAPABLE | PCIE_CAPABLE |
513 DISPLAY_CAPABLE;
514 asic = ASIC_ZEUS;
515 asic_phy_base = ZEUS_IO_BASE;
516 register_map = &zeus_register_map;
517 asic_base = (unsigned long)ioremap_nocache(asic_phy_base,
518 ASIC_IO_SIZE);
519 gp_resources = dvr_zeus_resources;
520
521 pr_info("Platform: 8500/RNG200 - ZEUS, DVR_CAPABLE\n");
522 break;
523
524 case FAMILY_8600:
525 case FAMILY_8600VZB:
526 platform_features = DVR_CAPABLE | PCIE_CAPABLE |
527 DISPLAY_CAPABLE;
528 asic = ASIC_CRONUS;
529 asic_phy_base = CRONUS_IO_BASE;
530 register_map = &cronus_register_map;
531 asic_base = (unsigned long)ioremap_nocache(asic_phy_base,
532 ASIC_IO_SIZE);
533 gp_resources = dvr_cronus_resources;
534
535 pr_info("Platform: 8600/Vz Class B - CRONUS, "
536 "DVR_CAPABLE\n");
537 break;
538
539 default:
540 pr_crit("Platform: UNKNOWN PLATFORM\n");
541 break;
542 }
543
544 switch (asic) {
545 case ASIC_ZEUS:
546 phys_to_bus_offset = 0x30000000;
547 break;
548 case ASIC_CALLIOPE:
549 phys_to_bus_offset = 0x10000000;
550 break;
551 case ASIC_CRONUSLITE:
552 /* Fall through */
553 case ASIC_CRONUS:
554 /*
555 * TODO: We suppose 0x10000000 aliases into 0x20000000-
556 * 0x2XXXXXXX. If 0x10000000 aliases into 0x60000000-
557 * 0x6XXXXXXX, the offset should be 0x50000000, not 0x10000000.
558 */
559 phys_to_bus_offset = 0x10000000;
560 break;
561 default:
562 phys_to_bus_offset = 0x00000000;
563 break;
564 }
565}
566
567/**
568 * platform_devices_init - sets up USB device resourse.
569 */
570static int __init platform_devices_init(void)
571{
572 pr_notice("%s: ----- Initializing USB resources -----\n", __func__);
573
574 asic_resource.start = asic_phy_base;
575 asic_resource.end += asic_resource.start;
576
577 ehci_resources[0].start = asic_reg_phys_addr(ehci_hcapbase);
578 ehci_resources[0].end += ehci_resources[0].start;
579
580 ohci_resources[0].start = asic_reg_phys_addr(ohci_hc_revision);
581 ohci_resources[0].end += ohci_resources[0].start;
582
583 set_io_port_base(0);
584
585 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
586
587 return 0;
588}
589
590arch_initcall(platform_devices_init);
591
592/*
593 *
594 * BOOTMEM ALLOCATION
595 *
596 */
597/*
598 * Allocates/reserves the Platform memory resources early in the boot process.
599 * This ignores any resources that are designated IORESOURCE_IO
600 */
601void __init platform_alloc_bootmem(void)
602{
603 int i;
604 int total = 0;
605
606 /* Get persistent memory data from command line before allocating
607 * resources. This need to happen before normal command line parsing
608 * has been done */
609 pmem_setup_resource();
610
611 /* Loop through looking for resources that want a particular address */
612 for (i = 0; gp_resources[i].flags != 0; i++) {
613 int size = gp_resources[i].end - gp_resources[i].start + 1;
614 if ((gp_resources[i].start != 0) &&
615 ((gp_resources[i].flags & IORESOURCE_MEM) != 0)) {
616 reserve_bootmem(bus_to_phys(gp_resources[i].start),
617 size, 0);
618 total += gp_resources[i].end -
619 gp_resources[i].start + 1;
620 pr_info("reserve resource %s at %08x (%u bytes)\n",
621 gp_resources[i].name, gp_resources[i].start,
622 gp_resources[i].end -
623 gp_resources[i].start + 1);
624 }
625 }
626
627 /* Loop through assigning addresses for those that are left */
628 for (i = 0; gp_resources[i].flags != 0; i++) {
629 int size = gp_resources[i].end - gp_resources[i].start + 1;
630 if ((gp_resources[i].start == 0) &&
631 ((gp_resources[i].flags & IORESOURCE_MEM) != 0)) {
632 void *mem = alloc_bootmem_pages(size);
633
634 if (mem == NULL)
635 pr_err("Unable to allocate bootmem pages "
636 "for %s\n", gp_resources[i].name);
637
638 else {
639 gp_resources[i].start =
640 phys_to_bus(virt_to_phys(mem));
641 gp_resources[i].end =
642 gp_resources[i].start + size - 1;
643 total += size;
644 pr_info("allocate resource %s at %08x "
645 "(%u bytes)\n",
646 gp_resources[i].name,
647 gp_resources[i].start, size);
648 }
649 }
650 }
651
652 pr_info("Total Platform driver memory allocation: 0x%08x\n", total);
653
654 /* indicate resources that are platform I/O related */
655 for (i = 0; gp_resources[i].flags != 0; i++) {
656 if ((gp_resources[i].start != 0) &&
657 ((gp_resources[i].flags & IORESOURCE_IO) != 0)) {
658 pr_info("reserved platform resource %s at %08x\n",
659 gp_resources[i].name, gp_resources[i].start);
660 }
661 }
662}
663
664/*
665 *
666 * PERSISTENT MEMORY (PMEM) CONFIGURATION
667 *
668 */
669static unsigned long pmemaddr __initdata;
670
671static int __init early_param_pmemaddr(char *p)
672{
673 pmemaddr = (unsigned long)simple_strtoul(p, NULL, 0);
674 return 0;
675}
676early_param("pmemaddr", early_param_pmemaddr);
677
678static long pmemlen __initdata;
679
680static int __init early_param_pmemlen(char *p)
681{
682/* TODO: we can use this code when and if the bootloader ever changes this */
683#if 0
684 pmemlen = (unsigned long)simple_strtoul(p, NULL, 0);
685#else
686 pmemlen = 0x20000;
687#endif
688 return 0;
689}
690early_param("pmemlen", early_param_pmemlen);
691
692/*
693 * Set up persistent memory. If we were given values, we patch the array of
694 * resources. Otherwise, persistent memory may be allocated anywhere at all.
695 */
696static void __init pmem_setup_resource(void)
697{
698 struct resource *resource;
699 resource = asic_resource_get("DiagPersistentMemory");
700
701 if (resource && pmemaddr && pmemlen) {
702 /* The address provided by bootloader is in kseg0. Convert to
703 * a bus address. */
704 resource->start = phys_to_bus(pmemaddr - 0x80000000);
705 resource->end = resource->start + pmemlen - 1;
706
707 pr_info("persistent memory: start=0x%x end=0x%x\n",
708 resource->start, resource->end);
709 }
710}
711
712/*
713 *
714 * RESOURCE ACCESS FUNCTIONS
715 *
716 */
717
718/**
719 * asic_resource_get - retrieves parameters for a platform resource.
720 * @name: string to match resource
721 *
722 * Returns a pointer to a struct resource corresponding to the given name.
723 *
724 * CANNOT BE NAMED platform_resource_get, which would be the obvious choice,
725 * as this function name is already declared
726 */
727struct resource *asic_resource_get(const char *name)
728{
729 int i;
730
731 for (i = 0; gp_resources[i].flags != 0; i++) {
732 if (strcmp(gp_resources[i].name, name) == 0)
733 return &gp_resources[i];
734 }
735
736 return NULL;
737}
738EXPORT_SYMBOL(asic_resource_get);
739
740/**
741 * platform_release_memory - release pre-allocated memory
742 * @ptr: pointer to memory to release
743 * @size: size of resource
744 *
745 * This must only be called for memory allocated or reserved via the boot
746 * memory allocator.
747 */
748void platform_release_memory(void *ptr, int size)
749{
750 unsigned long addr;
751 unsigned long end;
752
753 addr = ((unsigned long)ptr + (PAGE_SIZE - 1)) & PAGE_MASK;
754 end = ((unsigned long)ptr + size) & PAGE_MASK;
755
756 for (; addr < end; addr += PAGE_SIZE) {
757 ClearPageReserved(virt_to_page(__va(addr)));
758 init_page_count(virt_to_page(__va(addr)));
759 free_page((unsigned long)__va(addr));
760 }
761}
762EXPORT_SYMBOL(platform_release_memory);
763
764/*
765 *
766 * FEATURE AVAILABILITY FUNCTIONS
767 *
768 */
769int platform_supports_dvr(void)
770{
771 return (platform_features & DVR_CAPABLE) != 0;
772}
773
774int platform_supports_ffs(void)
775{
776 return (platform_features & FFS_CAPABLE) != 0;
777}
778
779int platform_supports_pcie(void)
780{
781 return (platform_features & PCIE_CAPABLE) != 0;
782}
783
784int platform_supports_display(void)
785{
786 return (platform_features & DISPLAY_CAPABLE) != 0;
787}
diff --git a/arch/mips/powertv/asic/asic_int.c b/arch/mips/powertv/asic/asic_int.c
new file mode 100644
index 000000000000..80b2eed21ac3
--- /dev/null
+++ b/arch/mips/powertv/asic/asic_int.c
@@ -0,0 +1,125 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 2000, 2001, 2004 MIPS Technologies, Inc.
4 * Copyright (C) 2001 Ralf Baechle
5 * Portions copyright (C) 2009 Cisco Systems, Inc.
6 *
7 * This program is free software; you can distribute it and/or modify it
8 * under the terms of the GNU General Public License (Version 2) as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
19 *
20 * Routines for generic manipulation of the interrupts found on the PowerTV
21 * platform.
22 *
23 * The interrupt controller is located in the South Bridge a PIIX4 device
24 * with two internal 82C95 interrupt controllers.
25 */
26#include <linux/init.h>
27#include <linux/irq.h>
28#include <linux/sched.h>
29#include <linux/slab.h>
30#include <linux/interrupt.h>
31#include <linux/kernel_stat.h>
32#include <linux/kernel.h>
33#include <linux/random.h>
34
35#include <asm/irq_cpu.h>
36#include <linux/io.h>
37#include <asm/irq_regs.h>
38#include <asm/mips-boards/generic.h>
39
40#include <asm/mach-powertv/asic_regs.h>
41
42static DEFINE_SPINLOCK(asic_irq_lock);
43
44static inline int get_int(void)
45{
46 unsigned long flags;
47 int irq;
48
49 spin_lock_irqsave(&asic_irq_lock, flags);
50
51 irq = (asic_read(int_int_scan) >> 4) - 1;
52
53 if (irq == 0 || irq >= NR_IRQS)
54 irq = -1;
55
56 spin_unlock_irqrestore(&asic_irq_lock, flags);
57
58 return irq;
59}
60
61static void asic_irqdispatch(void)
62{
63 int irq;
64
65 irq = get_int();
66 if (irq < 0)
67 return; /* interrupt has already been cleared */
68
69 do_IRQ(irq);
70}
71
72static inline int clz(unsigned long x)
73{
74 __asm__(
75 " .set push \n"
76 " .set mips32 \n"
77 " clz %0, %1 \n"
78 " .set pop \n"
79 : "=r" (x)
80 : "r" (x));
81
82 return x;
83}
84
85/*
86 * Version of ffs that only looks at bits 12..15.
87 */
88static inline unsigned int irq_ffs(unsigned int pending)
89{
90 return fls(pending) - 1 + CAUSEB_IP;
91}
92
93/*
94 * TODO: check how it works under EIC mode.
95 */
96asmlinkage void plat_irq_dispatch(void)
97{
98 unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
99 int irq;
100
101 irq = irq_ffs(pending);
102
103 if (irq == CAUSEF_IP3)
104 asic_irqdispatch();
105 else if (irq >= 0)
106 do_IRQ(irq);
107 else
108 spurious_interrupt();
109}
110
111void __init arch_init_irq(void)
112{
113 int i;
114
115 asic_irq_init();
116
117 /*
118 * Initialize interrupt exception vectors.
119 */
120 if (cpu_has_veic || cpu_has_vint) {
121 int nvec = cpu_has_veic ? 64 : 8;
122 for (i = 0; i < nvec; i++)
123 set_vi_handler(i, asic_irqdispatch);
124 }
125}
diff --git a/arch/mips/powertv/asic/irq_asic.c b/arch/mips/powertv/asic/irq_asic.c
new file mode 100644
index 000000000000..b54d24499b06
--- /dev/null
+++ b/arch/mips/powertv/asic/irq_asic.c
@@ -0,0 +1,116 @@
1/*
2 * Portions copyright (C) 2005-2009 Scientific Atlanta
3 * Portions copyright (C) 2009 Cisco Systems, Inc.
4 *
5 * Modified from arch/mips/kernel/irq-rm7000.c:
6 * Copyright (C) 2003 Ralf Baechle
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13#include <linux/init.h>
14#include <linux/interrupt.h>
15#include <linux/kernel.h>
16
17#include <asm/irq_cpu.h>
18#include <asm/mipsregs.h>
19#include <asm/system.h>
20
21#include <asm/mach-powertv/asic_regs.h>
22
23static inline void unmask_asic_irq(unsigned int irq)
24{
25 unsigned long enable_bit;
26
27 enable_bit = (1 << (irq & 0x1f));
28
29 switch (irq >> 5) {
30 case 0:
31 asic_write(asic_read(ien_int_0) | enable_bit, ien_int_0);
32 break;
33 case 1:
34 asic_write(asic_read(ien_int_1) | enable_bit, ien_int_1);
35 break;
36 case 2:
37 asic_write(asic_read(ien_int_2) | enable_bit, ien_int_2);
38 break;
39 case 3:
40 asic_write(asic_read(ien_int_3) | enable_bit, ien_int_3);
41 break;
42 default:
43 BUG();
44 }
45}
46
47static inline void mask_asic_irq(unsigned int irq)
48{
49 unsigned long disable_mask;
50
51 disable_mask = ~(1 << (irq & 0x1f));
52
53 switch (irq >> 5) {
54 case 0:
55 asic_write(asic_read(ien_int_0) & disable_mask, ien_int_0);
56 break;
57 case 1:
58 asic_write(asic_read(ien_int_1) & disable_mask, ien_int_1);
59 break;
60 case 2:
61 asic_write(asic_read(ien_int_2) & disable_mask, ien_int_2);
62 break;
63 case 3:
64 asic_write(asic_read(ien_int_3) & disable_mask, ien_int_3);
65 break;
66 default:
67 BUG();
68 }
69}
70
71static struct irq_chip asic_irq_chip = {
72 .name = "ASIC Level",
73 .ack = mask_asic_irq,
74 .mask = mask_asic_irq,
75 .mask_ack = mask_asic_irq,
76 .unmask = unmask_asic_irq,
77 .eoi = unmask_asic_irq,
78};
79
80void __init asic_irq_init(void)
81{
82 int i;
83
84 /* set priority to 0 */
85 write_c0_status(read_c0_status() & ~(0x0000fc00));
86
87 asic_write(0, ien_int_0);
88 asic_write(0, ien_int_1);
89 asic_write(0, ien_int_2);
90 asic_write(0, ien_int_3);
91
92 asic_write(0x0fffffff, int_level_3_3);
93 asic_write(0xffffffff, int_level_3_2);
94 asic_write(0xffffffff, int_level_3_1);
95 asic_write(0xffffffff, int_level_3_0);
96 asic_write(0xffffffff, int_level_2_3);
97 asic_write(0xffffffff, int_level_2_2);
98 asic_write(0xffffffff, int_level_2_1);
99 asic_write(0xffffffff, int_level_2_0);
100 asic_write(0xffffffff, int_level_1_3);
101 asic_write(0xffffffff, int_level_1_2);
102 asic_write(0xffffffff, int_level_1_1);
103 asic_write(0xffffffff, int_level_1_0);
104 asic_write(0xffffffff, int_level_0_3);
105 asic_write(0xffffffff, int_level_0_2);
106 asic_write(0xffffffff, int_level_0_1);
107 asic_write(0xffffffff, int_level_0_0);
108
109 asic_write(0xf, int_int_scan);
110
111 /*
112 * Initialize interrupt handlers.
113 */
114 for (i = 0; i < NR_IRQS; i++)
115 set_irq_chip_and_handler(i, &asic_irq_chip, handle_level_irq);
116}
diff --git a/arch/mips/powertv/asic/prealloc-calliope.c b/arch/mips/powertv/asic/prealloc-calliope.c
new file mode 100644
index 000000000000..cd5b76a1c951
--- /dev/null
+++ b/arch/mips/powertv/asic/prealloc-calliope.c
@@ -0,0 +1,620 @@
1/*
2 * Memory pre-allocations for Calliope boxes.
3 *
4 * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 *
20 * Author: Ken Eppinett
21 * David Schleef <ds@schleef.org>
22 */
23
24#include <linux/init.h>
25#include <asm/mach-powertv/asic.h>
26
27/*
28 * NON_DVR_CAPABLE CALLIOPE RESOURCES
29 */
30struct resource non_dvr_calliope_resources[] __initdata =
31{
32 /*
33 * VIDEO / LX1
34 */
35 {
36 .name = "ST231aImage", /* Delta-Mu 1 image and ram */
37 .start = 0x24000000,
38 .end = 0x24200000 - 1, /*2MiB */
39 .flags = IORESOURCE_MEM,
40 },
41 {
42 .name = "ST231aMonitor", /*8KiB block ST231a monitor */
43 .start = 0x24200000,
44 .end = 0x24202000 - 1,
45 .flags = IORESOURCE_MEM,
46 },
47 {
48 .name = "MediaMemory1",
49 .start = 0x24202000,
50 .end = 0x26700000 - 1, /*~36.9MiB (32MiB - (2MiB + 8KiB)) */
51 .flags = IORESOURCE_MEM,
52 },
53 /*
54 * Sysaudio Driver
55 */
56 {
57 .name = "DSP_Image_Buff",
58 .start = 0x00000000,
59 .end = 0x000FFFFF,
60 .flags = IORESOURCE_MEM,
61 },
62 {
63 .name = "ADSC_CPU_PCM_Buff",
64 .start = 0x00000000,
65 .end = 0x00009FFF,
66 .flags = IORESOURCE_MEM,
67 },
68 {
69 .name = "ADSC_AUX_Buff",
70 .start = 0x00000000,
71 .end = 0x00003FFF,
72 .flags = IORESOURCE_MEM,
73 },
74 {
75 .name = "ADSC_Main_Buff",
76 .start = 0x00000000,
77 .end = 0x00003FFF,
78 .flags = IORESOURCE_MEM,
79 },
80 /*
81 * STAVEM driver/STAPI
82 */
83 {
84 .name = "AVMEMPartition0",
85 .start = 0x00000000,
86 .end = 0x00600000 - 1, /* 6 MB total */
87 .flags = IORESOURCE_MEM,
88 },
89 /*
90 * DOCSIS Subsystem
91 */
92 {
93 .name = "Docsis",
94 .start = 0x22000000,
95 .end = 0x22700000 - 1,
96 .flags = IORESOURCE_MEM,
97 },
98 /*
99 * GHW HAL Driver
100 */
101 {
102 .name = "GraphicsHeap",
103 .start = 0x22700000,
104 .end = 0x23500000 - 1, /* 14 MB total */
105 .flags = IORESOURCE_MEM,
106 },
107 /*
108 * multi com buffer area
109 */
110 {
111 .name = "MulticomSHM",
112 .start = 0x23700000,
113 .end = 0x23720000 - 1,
114 .flags = IORESOURCE_MEM,
115 },
116 /*
117 * DMA Ring buffer (don't need recording buffers)
118 */
119 {
120 .name = "BMM_Buffer",
121 .start = 0x00000000,
122 .end = 0x000AA000 - 1,
123 .flags = IORESOURCE_MEM,
124 },
125 /*
126 * Display bins buffer for unit0
127 */
128 {
129 .name = "DisplayBins0",
130 .start = 0x00000000,
131 .end = 0x00000FFF, /* 4 KB total */
132 .flags = IORESOURCE_MEM,
133 },
134 /*
135 *
136 * AVFS: player HAL memory
137 *
138 *
139 */
140 {
141 .name = "AvfsDmaMem",
142 .start = 0x00000000,
143 .end = 0x002c4c00 - 1, /* 945K * 3 for playback */
144 .flags = IORESOURCE_MEM,
145 },
146 /*
147 * PMEM
148 */
149 {
150 .name = "DiagPersistentMemory",
151 .start = 0x00000000,
152 .end = 0x10000 - 1,
153 .flags = IORESOURCE_MEM,
154 },
155 /*
156 * Smartcard
157 */
158 {
159 .name = "SmartCardInfo",
160 .start = 0x00000000,
161 .end = 0x2800 - 1,
162 .flags = IORESOURCE_MEM,
163 },
164 /*
165 * NAND Flash
166 */
167 {
168 .name = "NandFlash",
169 .start = NAND_FLASH_BASE,
170 .end = NAND_FLASH_BASE + 0x400 - 1,
171 .flags = IORESOURCE_IO,
172 },
173 /*
174 * Synopsys GMAC Memory Region
175 */
176 {
177 .name = "GMAC",
178 .start = 0x00000000,
179 .end = 0x00010000 - 1,
180 .flags = IORESOURCE_MEM,
181 },
182 /*
183 * Add other resources here
184 *
185 */
186 { },
187};
188
189struct resource non_dvr_vz_calliope_resources[] __initdata =
190{
191 /*
192 * VIDEO / LX1
193 */
194 {
195 .name = "ST231aImage", /* Delta-Mu 1 image and ram */
196 .start = 0x24000000,
197 .end = 0x24200000 - 1, /*2 Meg */
198 .flags = IORESOURCE_MEM,
199 },
200 {
201 .name = "ST231aMonitor", /* 8k block ST231a monitor */
202 .start = 0x24200000,
203 .end = 0x24202000 - 1,
204 .flags = IORESOURCE_MEM,
205 },
206 {
207 .name = "MediaMemory1",
208 .start = 0x22202000,
209 .end = 0x22C20B85 - 1, /* 10.12 Meg */
210 .flags = IORESOURCE_MEM,
211 },
212 /*
213 * Sysaudio Driver
214 */
215 {
216 .name = "DSP_Image_Buff",
217 .start = 0x00000000,
218 .end = 0x000FFFFF,
219 .flags = IORESOURCE_MEM,
220 },
221 {
222 .name = "ADSC_CPU_PCM_Buff",
223 .start = 0x00000000,
224 .end = 0x00009FFF,
225 .flags = IORESOURCE_MEM,
226 },
227 {
228 .name = "ADSC_AUX_Buff",
229 .start = 0x00000000,
230 .end = 0x00003FFF,
231 .flags = IORESOURCE_MEM,
232 },
233 {
234 .name = "ADSC_Main_Buff",
235 .start = 0x00000000,
236 .end = 0x00003FFF,
237 .flags = IORESOURCE_MEM,
238 },
239 /*
240 * STAVEM driver/STAPI
241 */
242 {
243 .name = "AVMEMPartition0",
244 .start = 0x20300000,
245 .end = 0x20620000-1, /*3.125 MB total */
246 .flags = IORESOURCE_MEM,
247 },
248 /*
249 * GHW HAL Driver
250 */
251 {
252 .name = "GraphicsHeap",
253 .start = 0x20100000,
254 .end = 0x20300000 - 1,
255 .flags = IORESOURCE_MEM,
256 },
257 /*
258 * multi com buffer area
259 */
260 {
261 .name = "MulticomSHM",
262 .start = 0x23900000,
263 .end = 0x23920000 - 1,
264 .flags = IORESOURCE_MEM,
265 },
266 /*
267 * DMA Ring buffer
268 */
269 {
270 .name = "BMM_Buffer",
271 .start = 0x00000000,
272 .end = 0x000AA000 - 1,
273 .flags = IORESOURCE_MEM,
274 },
275 /*
276 * Display bins buffer for unit0
277 */
278 {
279 .name = "DisplayBins0",
280 .start = 0x00000000,
281 .end = 0x00000FFF,
282 .flags = IORESOURCE_MEM,
283 },
284 /*
285 * PMEM
286 */
287 {
288 .name = "DiagPersistentMemory",
289 .start = 0x00000000,
290 .end = 0x10000 - 1,
291 .flags = IORESOURCE_MEM,
292 },
293 /*
294 * Smartcard
295 */
296 {
297 .name = "SmartCardInfo",
298 .start = 0x00000000,
299 .end = 0x2800 - 1,
300 .flags = IORESOURCE_MEM,
301 },
302 /*
303 * NAND Flash
304 */
305 {
306 .name = "NandFlash",
307 .start = NAND_FLASH_BASE,
308 .end = NAND_FLASH_BASE+0x400 - 1,
309 .flags = IORESOURCE_IO,
310 },
311 /*
312 * Synopsys GMAC Memory Region
313 */
314 {
315 .name = "GMAC",
316 .start = 0x00000000,
317 .end = 0x00010000 - 1,
318 .flags = IORESOURCE_MEM,
319 },
320 /*
321 * Add other resources here
322 */
323 { },
324};
325
326struct resource non_dvr_vze_calliope_resources[] __initdata =
327{
328 /*
329 * VIDEO / LX1
330 */
331 {
332 .name = "ST231aImage", /* Delta-Mu 1 image and ram */
333 .start = 0x22000000,
334 .end = 0x22200000 - 1, /*2 Meg */
335 .flags = IORESOURCE_MEM,
336 },
337 {
338 .name = "ST231aMonitor", /* 8k block ST231a monitor */
339 .start = 0x22200000,
340 .end = 0x22202000 - 1,
341 .flags = IORESOURCE_MEM,
342 },
343 {
344 .name = "MediaMemory1",
345 .start = 0x22202000,
346 .end = 0x22C20B85 - 1, /* 10.12 Meg */
347 .flags = IORESOURCE_MEM,
348 },
349 /*
350 * Sysaudio Driver
351 */
352 {
353 .name = "DSP_Image_Buff",
354 .start = 0x00000000,
355 .end = 0x000FFFFF,
356 .flags = IORESOURCE_MEM,
357 },
358 {
359 .name = "ADSC_CPU_PCM_Buff",
360 .start = 0x00000000,
361 .end = 0x00009FFF,
362 .flags = IORESOURCE_MEM,
363 },
364 {
365 .name = "ADSC_AUX_Buff",
366 .start = 0x00000000,
367 .end = 0x00003FFF,
368 .flags = IORESOURCE_MEM,
369 },
370 {
371 .name = "ADSC_Main_Buff",
372 .start = 0x00000000,
373 .end = 0x00003FFF,
374 .flags = IORESOURCE_MEM,
375 },
376 /*
377 * STAVEM driver/STAPI
378 */
379 {
380 .name = "AVMEMPartition0",
381 .start = 0x20396000,
382 .end = 0x206B6000 - 1, /* 3.125 MB total */
383 .flags = IORESOURCE_MEM,
384 },
385 /*
386 * GHW HAL Driver
387 */
388 {
389 .name = "GraphicsHeap",
390 .start = 0x20100000,
391 .end = 0x20396000 - 1,
392 .flags = IORESOURCE_MEM,
393 },
394 /*
395 * multi com buffer area
396 */
397 {
398 .name = "MulticomSHM",
399 .start = 0x206B6000,
400 .end = 0x206D6000 - 1,
401 .flags = IORESOURCE_MEM,
402 },
403 /*
404 * DMA Ring buffer
405 */
406 {
407 .name = "BMM_Buffer",
408 .start = 0x00000000,
409 .end = 0x000AA000 - 1,
410 .flags = IORESOURCE_MEM,
411 },
412 /*
413 * Display bins buffer for unit0
414 */
415 {
416 .name = "DisplayBins0",
417 .start = 0x00000000,
418 .end = 0x00000FFF,
419 .flags = IORESOURCE_MEM,
420 },
421 /*
422 * PMEM
423 */
424 {
425 .name = "DiagPersistentMemory",
426 .start = 0x00000000,
427 .end = 0x10000 - 1,
428 .flags = IORESOURCE_MEM,
429 },
430 /*
431 * Smartcard
432 */
433 {
434 .name = "SmartCardInfo",
435 .start = 0x00000000,
436 .end = 0x2800 - 1,
437 .flags = IORESOURCE_MEM,
438 },
439 /*
440 * NAND Flash
441 */
442 {
443 .name = "NandFlash",
444 .start = NAND_FLASH_BASE,
445 .end = NAND_FLASH_BASE+0x400 - 1,
446 .flags = IORESOURCE_MEM,
447 },
448 /*
449 * Synopsys GMAC Memory Region
450 */
451 {
452 .name = "GMAC",
453 .start = 0x00000000,
454 .end = 0x00010000 - 1,
455 .flags = IORESOURCE_MEM,
456 },
457 /*
458 * Add other resources here
459 */
460 { },
461};
462
463struct resource non_dvr_vzf_calliope_resources[] __initdata =
464{
465 /*
466 * VIDEO / LX1
467 */
468 {
469 .name = "ST231aImage", /*Delta-Mu 1 image and ram */
470 .start = 0x24000000,
471 .end = 0x24200000 - 1, /*2MiB */
472 .flags = IORESOURCE_MEM,
473 },
474 {
475 .name = "ST231aMonitor", /*8KiB block ST231a monitor */
476 .start = 0x24200000,
477 .end = 0x24202000 - 1,
478 .flags = IORESOURCE_MEM,
479 },
480 {
481 .name = "MediaMemory1",
482 .start = 0x24202000,
483 /* ~19.4 (21.5MiB - (2MiB + 8KiB)) */
484 .end = 0x25580000 - 1,
485 .flags = IORESOURCE_MEM,
486 },
487 /*
488 * Sysaudio Driver
489 */
490 {
491 .name = "DSP_Image_Buff",
492 .start = 0x00000000,
493 .end = 0x000FFFFF,
494 .flags = IORESOURCE_MEM,
495 },
496 {
497 .name = "ADSC_CPU_PCM_Buff",
498 .start = 0x00000000,
499 .end = 0x00009FFF,
500 .flags = IORESOURCE_MEM,
501 },
502 {
503 .name = "ADSC_AUX_Buff",
504 .start = 0x00000000,
505 .end = 0x00003FFF,
506 .flags = IORESOURCE_MEM,
507 },
508 {
509 .name = "ADSC_Main_Buff",
510 .start = 0x00000000,
511 .end = 0x00003FFF,
512 .flags = IORESOURCE_MEM,
513 },
514 /*
515 * STAVEM driver/STAPI
516 */
517 {
518 .name = "AVMEMPartition0",
519 .start = 0x00000000,
520 .end = 0x00480000 - 1, /* 4.5 MB total */
521 .flags = IORESOURCE_MEM,
522 },
523 /*
524 * GHW HAL Driver
525 */
526 {
527 .name = "GraphicsHeap",
528 .start = 0x22700000,
529 .end = 0x23500000 - 1, /* 14 MB total */
530 .flags = IORESOURCE_MEM,
531 },
532 /*
533 * multi com buffer area
534 */
535 {
536 .name = "MulticomSHM",
537 .start = 0x23700000,
538 .end = 0x23720000 - 1,
539 .flags = IORESOURCE_MEM,
540 },
541 /*
542 * DMA Ring buffer (don't need recording buffers)
543 */
544 {
545 .name = "BMM_Buffer",
546 .start = 0x00000000,
547 .end = 0x000AA000 - 1,
548 .flags = IORESOURCE_MEM,
549 },
550 /*
551 * Display bins buffer for unit0
552 */
553 {
554 .name = "DisplayBins0",
555 .start = 0x00000000,
556 .end = 0x00000FFF, /* 4 KB total */
557 .flags = IORESOURCE_MEM,
558 },
559 /*
560 * Display bins buffer for unit1
561 */
562 {
563 .name = "DisplayBins1",
564 .start = 0x00000000,
565 .end = 0x00000FFF, /* 4 KB total */
566 .flags = IORESOURCE_MEM,
567 },
568 /*
569 *
570 * AVFS: player HAL memory
571 *
572 *
573 */
574 {
575 .name = "AvfsDmaMem",
576 .start = 0x00000000,
577 .end = 0x002c4c00 - 1, /* 945K * 3 for playback */
578 .flags = IORESOURCE_MEM,
579 },
580 /*
581 * PMEM
582 */
583 {
584 .name = "DiagPersistentMemory",
585 .start = 0x00000000,
586 .end = 0x10000 - 1,
587 .flags = IORESOURCE_MEM,
588 },
589 /*
590 * Smartcard
591 */
592 {
593 .name = "SmartCardInfo",
594 .start = 0x00000000,
595 .end = 0x2800 - 1,
596 .flags = IORESOURCE_MEM,
597 },
598 /*
599 * NAND Flash
600 */
601 {
602 .name = "NandFlash",
603 .start = NAND_FLASH_BASE,
604 .end = NAND_FLASH_BASE + 0x400 - 1,
605 .flags = IORESOURCE_MEM,
606 },
607 /*
608 * Synopsys GMAC Memory Region
609 */
610 {
611 .name = "GMAC",
612 .start = 0x00000000,
613 .end = 0x00010000 - 1,
614 .flags = IORESOURCE_MEM,
615 },
616 /*
617 * Add other resources here
618 */
619 { },
620};
diff --git a/arch/mips/powertv/asic/prealloc-cronus.c b/arch/mips/powertv/asic/prealloc-cronus.c
new file mode 100644
index 000000000000..45a5c3ea718c
--- /dev/null
+++ b/arch/mips/powertv/asic/prealloc-cronus.c
@@ -0,0 +1,608 @@
1/*
2 * Memory pre-allocations for Cronus boxes.
3 *
4 * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 *
20 * Author: Ken Eppinett
21 * David Schleef <ds@schleef.org>
22 */
23
24#include <linux/init.h>
25#include <asm/mach-powertv/asic.h>
26
27/*
28 * DVR_CAPABLE CRONUS RESOURCES
29 */
30struct resource dvr_cronus_resources[] __initdata =
31{
32 /*
33 *
34 * VIDEO1 / LX1
35 *
36 */
37 {
38 .name = "ST231aImage", /* Delta-Mu 1 image and ram */
39 .start = 0x24000000,
40 .end = 0x241FFFFF, /* 2MiB */
41 .flags = IORESOURCE_MEM,
42 },
43 {
44 .name = "ST231aMonitor", /* 8KiB block ST231a monitor */
45 .start = 0x24200000,
46 .end = 0x24201FFF,
47 .flags = IORESOURCE_MEM,
48 },
49 {
50 .name = "MediaMemory1",
51 .start = 0x24202000,
52 .end = 0x25FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
53 .flags = IORESOURCE_MEM,
54 },
55 /*
56 *
57 * VIDEO2 / LX2
58 *
59 */
60 {
61 .name = "ST231bImage", /* Delta-Mu 2 image and ram */
62 .start = 0x60000000,
63 .end = 0x601FFFFF, /* 2MiB */
64 .flags = IORESOURCE_IO,
65 },
66 {
67 .name = "ST231bMonitor", /* 8KiB block ST231b monitor */
68 .start = 0x60200000,
69 .end = 0x60201FFF,
70 .flags = IORESOURCE_IO,
71 },
72 {
73 .name = "MediaMemory2",
74 .start = 0x60202000,
75 .end = 0x61FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
76 .flags = IORESOURCE_IO,
77 },
78 /*
79 *
80 * Sysaudio Driver
81 *
82 * This driver requires:
83 *
84 * Arbitrary Based Buffers:
85 * DSP_Image_Buff - DSP code and data images (1MB)
86 * ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB)
87 * ADSC_AUX_Buff - ADSC AUX buffer (16KB)
88 * ADSC_Main_Buff - ADSC Main buffer (16KB)
89 *
90 */
91 {
92 .name = "DSP_Image_Buff",
93 .start = 0x00000000,
94 .end = 0x000FFFFF,
95 .flags = IORESOURCE_MEM,
96 },
97 {
98 .name = "ADSC_CPU_PCM_Buff",
99 .start = 0x00000000,
100 .end = 0x00009FFF,
101 .flags = IORESOURCE_MEM,
102 },
103 {
104 .name = "ADSC_AUX_Buff",
105 .start = 0x00000000,
106 .end = 0x00003FFF,
107 .flags = IORESOURCE_MEM,
108 },
109 {
110 .name = "ADSC_Main_Buff",
111 .start = 0x00000000,
112 .end = 0x00003FFF,
113 .flags = IORESOURCE_MEM,
114 },
115 /*
116 *
117 * STAVEM driver/STAPI
118 *
119 * This driver requires:
120 *
121 * Arbitrary Based Buffers:
122 * This memory area is used for allocating buffers for Video decoding
123 * purposes. Allocation/De-allocation within this buffer is managed
124 * by the STAVMEM driver of the STAPI. They could be Decimated
125 * Picture Buffers, Intermediate Buffers, as deemed necessary for
126 * video decoding purposes, for any video decoders on Zeus.
127 *
128 */
129 {
130 .name = "AVMEMPartition0",
131 .start = 0x63580000,
132 .end = 0x64180000 - 1, /* 12 MB total */
133 .flags = IORESOURCE_IO,
134 },
135 /*
136 *
137 * DOCSIS Subsystem
138 *
139 * This driver requires:
140 *
141 * Arbitrary Based Buffers:
142 * Docsis -
143 *
144 */
145 {
146 .name = "Docsis",
147 .start = 0x62000000,
148 .end = 0x62700000 - 1, /* 7 MB total */
149 .flags = IORESOURCE_IO,
150 },
151 /*
152 *
153 * GHW HAL Driver
154 *
155 * This driver requires:
156 *
157 * Arbitrary Based Buffers:
158 * GraphicsHeap - PowerTV Graphics Heap
159 *
160 */
161 {
162 .name = "GraphicsHeap",
163 .start = 0x62700000,
164 .end = 0x63500000 - 1, /* 14 MB total */
165 .flags = IORESOURCE_IO,
166 },
167 /*
168 *
169 * multi com buffer area
170 *
171 * This driver requires:
172 *
173 * Arbitrary Based Buffers:
174 * Docsis -
175 *
176 */
177 {
178 .name = "MulticomSHM",
179 .start = 0x26000000,
180 .end = 0x26020000 - 1,
181 .flags = IORESOURCE_MEM,
182 },
183 /*
184 *
185 * DMA Ring buffer
186 *
187 * This driver requires:
188 *
189 * Arbitrary Based Buffers:
190 * Docsis -
191 *
192 */
193 {
194 .name = "BMM_Buffer",
195 .start = 0x00000000,
196 .end = 0x00280000 - 1,
197 .flags = IORESOURCE_MEM,
198 },
199 /*
200 *
201 * Display bins buffer for unit0
202 *
203 * This driver requires:
204 *
205 * Arbitrary Based Buffers:
206 * Display Bins for unit0
207 *
208 */
209 {
210 .name = "DisplayBins0",
211 .start = 0x00000000,
212 .end = 0x00000FFF, /* 4 KB total */
213 .flags = IORESOURCE_MEM,
214 },
215 /*
216 *
217 * Display bins buffer
218 *
219 * This driver requires:
220 *
221 * Arbitrary Based Buffers:
222 * Display Bins for unit1
223 *
224 */
225 {
226 .name = "DisplayBins1",
227 .start = 0x64AD4000,
228 .end = 0x64AD5000 - 1, /* 4 KB total */
229 .flags = IORESOURCE_IO,
230 },
231 /*
232 *
233 * ITFS
234 *
235 * This driver requires:
236 *
237 * Arbitrary Based Buffers:
238 * Docsis -
239 *
240 */
241 {
242 .name = "ITFS",
243 .start = 0x64180000,
244 /* 815,104 bytes each for 2 ITFS partitions. */
245 .end = 0x6430DFFF,
246 .flags = IORESOURCE_IO,
247 },
248 /*
249 *
250 * AVFS
251 *
252 * This driver requires:
253 *
254 * Arbitrary Based Buffers:
255 * Docsis -
256 *
257 */
258 {
259 .name = "AvfsDmaMem",
260 .start = 0x6430E000,
261 /* (945K * 8) = (128K *3) 5 playbacks / 3 server */
262 .end = 0x64AD0000 - 1,
263 .flags = IORESOURCE_IO,
264 },
265 {
266 .name = "AvfsFileSys",
267 .start = 0x64AD0000,
268 .end = 0x64AD1000 - 1, /* 4K */
269 .flags = IORESOURCE_IO,
270 },
271 /*
272 *
273 * PMEM
274 *
275 * This driver requires:
276 *
277 * Arbitrary Based Buffers:
278 * Persistent memory for diagnostics.
279 *
280 */
281 {
282 .name = "DiagPersistentMemory",
283 .start = 0x00000000,
284 .end = 0x10000 - 1,
285 .flags = IORESOURCE_MEM,
286 },
287 /*
288 *
289 * Smartcard
290 *
291 * This driver requires:
292 *
293 * Arbitrary Based Buffers:
294 * Read and write buffers for Internal/External cards
295 *
296 */
297 {
298 .name = "SmartCardInfo",
299 .start = 0x64AD1000,
300 .end = 0x64AD3800 - 1,
301 .flags = IORESOURCE_IO,
302 },
303 /*
304 *
305 * KAVNET
306 * NP Reset Vector - must be of the form xxCxxxxx
307 * NP Image - must be video bank 1
308 * NP IPC - must be video bank 2
309 */
310 {
311 .name = "NP_Reset_Vector",
312 .start = 0x27c00000,
313 .end = 0x27c01000 - 1,
314 .flags = IORESOURCE_MEM,
315 },
316 {
317 .name = "NP_Image",
318 .start = 0x27020000,
319 .end = 0x27060000 - 1,
320 .flags = IORESOURCE_MEM,
321 },
322 {
323 .name = "NP_IPC",
324 .start = 0x63500000,
325 .end = 0x63580000 - 1,
326 .flags = IORESOURCE_IO,
327 },
328 /*
329 * Add other resources here
330 */
331 { },
332};
333
334/*
335 * NON_DVR_CAPABLE CRONUS RESOURCES
336 */
337struct resource non_dvr_cronus_resources[] __initdata =
338{
339 /*
340 *
341 * VIDEO1 / LX1
342 *
343 */
344 {
345 .name = "ST231aImage", /* Delta-Mu 1 image and ram */
346 .start = 0x24000000,
347 .end = 0x241FFFFF, /* 2MiB */
348 .flags = IORESOURCE_MEM,
349 },
350 {
351 .name = "ST231aMonitor", /* 8KiB block ST231a monitor */
352 .start = 0x24200000,
353 .end = 0x24201FFF,
354 .flags = IORESOURCE_MEM,
355 },
356 {
357 .name = "MediaMemory1",
358 .start = 0x24202000,
359 .end = 0x25FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
360 .flags = IORESOURCE_MEM,
361 },
362 /*
363 *
364 * VIDEO2 / LX2
365 *
366 */
367 {
368 .name = "ST231bImage", /* Delta-Mu 2 image and ram */
369 .start = 0x60000000,
370 .end = 0x601FFFFF, /* 2MiB */
371 .flags = IORESOURCE_IO,
372 },
373 {
374 .name = "ST231bMonitor", /* 8KiB block ST231b monitor */
375 .start = 0x60200000,
376 .end = 0x60201FFF,
377 .flags = IORESOURCE_IO,
378 },
379 {
380 .name = "MediaMemory2",
381 .start = 0x60202000,
382 .end = 0x61FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
383 .flags = IORESOURCE_IO,
384 },
385 /*
386 *
387 * Sysaudio Driver
388 *
389 * This driver requires:
390 *
391 * Arbitrary Based Buffers:
392 * DSP_Image_Buff - DSP code and data images (1MB)
393 * ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB)
394 * ADSC_AUX_Buff - ADSC AUX buffer (16KB)
395 * ADSC_Main_Buff - ADSC Main buffer (16KB)
396 *
397 */
398 {
399 .name = "DSP_Image_Buff",
400 .start = 0x00000000,
401 .end = 0x000FFFFF,
402 .flags = IORESOURCE_MEM,
403 },
404 {
405 .name = "ADSC_CPU_PCM_Buff",
406 .start = 0x00000000,
407 .end = 0x00009FFF,
408 .flags = IORESOURCE_MEM,
409 },
410 {
411 .name = "ADSC_AUX_Buff",
412 .start = 0x00000000,
413 .end = 0x00003FFF,
414 .flags = IORESOURCE_MEM,
415 },
416 {
417 .name = "ADSC_Main_Buff",
418 .start = 0x00000000,
419 .end = 0x00003FFF,
420 .flags = IORESOURCE_MEM,
421 },
422 /*
423 *
424 * STAVEM driver/STAPI
425 *
426 * This driver requires:
427 *
428 * Arbitrary Based Buffers:
429 * This memory area is used for allocating buffers for Video decoding
430 * purposes. Allocation/De-allocation within this buffer is managed
431 * by the STAVMEM driver of the STAPI. They could be Decimated
432 * Picture Buffers, Intermediate Buffers, as deemed necessary for
433 * video decoding purposes, for any video decoders on Zeus.
434 *
435 */
436 {
437 .name = "AVMEMPartition0",
438 .start = 0x63580000,
439 .end = 0x64180000 - 1, /* 12 MB total */
440 .flags = IORESOURCE_IO,
441 },
442 /*
443 *
444 * DOCSIS Subsystem
445 *
446 * This driver requires:
447 *
448 * Arbitrary Based Buffers:
449 * Docsis -
450 *
451 */
452 {
453 .name = "Docsis",
454 .start = 0x62000000,
455 .end = 0x62700000 - 1, /* 7 MB total */
456 .flags = IORESOURCE_IO,
457 },
458 /*
459 *
460 * GHW HAL Driver
461 *
462 * This driver requires:
463 *
464 * Arbitrary Based Buffers:
465 * GraphicsHeap - PowerTV Graphics Heap
466 *
467 */
468 {
469 .name = "GraphicsHeap",
470 .start = 0x62700000,
471 .end = 0x63500000 - 1, /* 14 MB total */
472 .flags = IORESOURCE_IO,
473 },
474 /*
475 *
476 * multi com buffer area
477 *
478 * This driver requires:
479 *
480 * Arbitrary Based Buffers:
481 * Docsis -
482 *
483 */
484 {
485 .name = "MulticomSHM",
486 .start = 0x26000000,
487 .end = 0x26020000 - 1,
488 .flags = IORESOURCE_MEM,
489 },
490 /*
491 *
492 * DMA Ring buffer
493 *
494 * This driver requires:
495 *
496 * Arbitrary Based Buffers:
497 * Docsis -
498 *
499 */
500 {
501 .name = "BMM_Buffer",
502 .start = 0x00000000,
503 .end = 0x000AA000 - 1,
504 .flags = IORESOURCE_MEM,
505 },
506 /*
507 *
508 * Display bins buffer for unit0
509 *
510 * This driver requires:
511 *
512 * Arbitrary Based Buffers:
513 * Display Bins for unit0
514 *
515 */
516 {
517 .name = "DisplayBins0",
518 .start = 0x00000000,
519 .end = 0x00000FFF, /* 4 KB total */
520 .flags = IORESOURCE_MEM,
521 },
522 /*
523 *
524 * Display bins buffer
525 *
526 * This driver requires:
527 *
528 * Arbitrary Based Buffers:
529 * Display Bins for unit1
530 *
531 */
532 {
533 .name = "DisplayBins1",
534 .start = 0x64AD4000,
535 .end = 0x64AD5000 - 1, /* 4 KB total */
536 .flags = IORESOURCE_IO,
537 },
538 /*
539 *
540 * AVFS: player HAL memory
541 *
542 *
543 */
544 {
545 .name = "AvfsDmaMem",
546 .start = 0x6430E000,
547 .end = 0x645D2C00 - 1, /* 945K * 3 for playback */
548 .flags = IORESOURCE_IO,
549 },
550 /*
551 *
552 * PMEM
553 *
554 * This driver requires:
555 *
556 * Arbitrary Based Buffers:
557 * Persistent memory for diagnostics.
558 *
559 */
560 {
561 .name = "DiagPersistentMemory",
562 .start = 0x00000000,
563 .end = 0x10000 - 1,
564 .flags = IORESOURCE_MEM,
565 },
566 /*
567 *
568 * Smartcard
569 *
570 * This driver requires:
571 *
572 * Arbitrary Based Buffers:
573 * Read and write buffers for Internal/External cards
574 *
575 */
576 {
577 .name = "SmartCardInfo",
578 .start = 0x64AD1000,
579 .end = 0x64AD3800 - 1,
580 .flags = IORESOURCE_IO,
581 },
582 /*
583 *
584 * KAVNET
585 * NP Reset Vector - must be of the form xxCxxxxx
586 * NP Image - must be video bank 1
587 * NP IPC - must be video bank 2
588 */
589 {
590 .name = "NP_Reset_Vector",
591 .start = 0x27c00000,
592 .end = 0x27c01000 - 1,
593 .flags = IORESOURCE_MEM,
594 },
595 {
596 .name = "NP_Image",
597 .start = 0x27020000,
598 .end = 0x27060000 - 1,
599 .flags = IORESOURCE_MEM,
600 },
601 {
602 .name = "NP_IPC",
603 .start = 0x63500000,
604 .end = 0x63580000 - 1,
605 .flags = IORESOURCE_IO,
606 },
607 { },
608};
diff --git a/arch/mips/powertv/asic/prealloc-cronuslite.c b/arch/mips/powertv/asic/prealloc-cronuslite.c
new file mode 100644
index 000000000000..23a905613c04
--- /dev/null
+++ b/arch/mips/powertv/asic/prealloc-cronuslite.c
@@ -0,0 +1,290 @@
1/*
2 * Memory pre-allocations for Cronus Lite boxes.
3 *
4 * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 *
20 * Author: Ken Eppinett
21 * David Schleef <ds@schleef.org>
22 */
23
24#include <linux/init.h>
25#include <asm/mach-powertv/asic.h>
26
27/*
28 * NON_DVR_CAPABLE CRONUSLITE RESOURCES
29 */
30struct resource non_dvr_cronuslite_resources[] __initdata =
31{
32 /*
33 *
34 * VIDEO2 / LX2
35 *
36 */
37 {
38 .name = "ST231aImage", /* Delta-Mu 2 image and ram */
39 .start = 0x60000000,
40 .end = 0x601FFFFF, /* 2MiB */
41 .flags = IORESOURCE_IO,
42 },
43 {
44 .name = "ST231aMonitor", /* 8KiB block ST231b monitor */
45 .start = 0x60200000,
46 .end = 0x60201FFF,
47 .flags = IORESOURCE_IO,
48 },
49 {
50 .name = "MediaMemory1",
51 .start = 0x60202000,
52 .end = 0x61FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
53 .flags = IORESOURCE_IO,
54 },
55 /*
56 *
57 * Sysaudio Driver
58 *
59 * This driver requires:
60 *
61 * Arbitrary Based Buffers:
62 * DSP_Image_Buff - DSP code and data images (1MB)
63 * ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB)
64 * ADSC_AUX_Buff - ADSC AUX buffer (16KB)
65 * ADSC_Main_Buff - ADSC Main buffer (16KB)
66 *
67 */
68 {
69 .name = "DSP_Image_Buff",
70 .start = 0x00000000,
71 .end = 0x000FFFFF,
72 .flags = IORESOURCE_MEM,
73 },
74 {
75 .name = "ADSC_CPU_PCM_Buff",
76 .start = 0x00000000,
77 .end = 0x00009FFF,
78 .flags = IORESOURCE_MEM,
79 },
80 {
81 .name = "ADSC_AUX_Buff",
82 .start = 0x00000000,
83 .end = 0x00003FFF,
84 .flags = IORESOURCE_MEM,
85 },
86 {
87 .name = "ADSC_Main_Buff",
88 .start = 0x00000000,
89 .end = 0x00003FFF,
90 .flags = IORESOURCE_MEM,
91 },
92 /*
93 *
94 * STAVEM driver/STAPI
95 *
96 * This driver requires:
97 *
98 * Arbitrary Based Buffers:
99 * This memory area is used for allocating buffers for Video decoding
100 * purposes. Allocation/De-allocation within this buffer is managed
101 * by the STAVMEM driver of the STAPI. They could be Decimated
102 * Picture Buffers, Intermediate Buffers, as deemed necessary for
103 * video decoding purposes, for any video decoders on Zeus.
104 *
105 */
106 {
107 .name = "AVMEMPartition0",
108 .start = 0x63580000,
109 .end = 0x63B80000 - 1, /* 6 MB total */
110 .flags = IORESOURCE_IO,
111 },
112 /*
113 *
114 * DOCSIS Subsystem
115 *
116 * This driver requires:
117 *
118 * Arbitrary Based Buffers:
119 * Docsis -
120 *
121 */
122 {
123 .name = "Docsis",
124 .start = 0x62000000,
125 .end = 0x62700000 - 1, /* 7 MB total */
126 .flags = IORESOURCE_IO,
127 },
128 /*
129 *
130 * GHW HAL Driver
131 *
132 * This driver requires:
133 *
134 * Arbitrary Based Buffers:
135 * GraphicsHeap - PowerTV Graphics Heap
136 *
137 */
138 {
139 .name = "GraphicsHeap",
140 .start = 0x62700000,
141 .end = 0x63500000 - 1, /* 14 MB total */
142 .flags = IORESOURCE_IO,
143 },
144 /*
145 *
146 * multi com buffer area
147 *
148 * This driver requires:
149 *
150 * Arbitrary Based Buffers:
151 * Docsis -
152 *
153 */
154 {
155 .name = "MulticomSHM",
156 .start = 0x26000000,
157 .end = 0x26020000 - 1,
158 .flags = IORESOURCE_MEM,
159 },
160 /*
161 *
162 * DMA Ring buffer
163 *
164 * This driver requires:
165 *
166 * Arbitrary Based Buffers:
167 * Docsis -
168 *
169 */
170 {
171 .name = "BMM_Buffer",
172 .start = 0x00000000,
173 .end = 0x000AA000 - 1,
174 .flags = IORESOURCE_MEM,
175 },
176 /*
177 *
178 * Display bins buffer for unit0
179 *
180 * This driver requires:
181 *
182 * Arbitrary Based Buffers:
183 * Display Bins for unit0
184 *
185 */
186 {
187 .name = "DisplayBins0",
188 .start = 0x00000000,
189 .end = 0x00000FFF, /* 4 KB total */
190 .flags = IORESOURCE_MEM,
191 },
192 /*
193 *
194 * Display bins buffer
195 *
196 * This driver requires:
197 *
198 * Arbitrary Based Buffers:
199 * Display Bins for unit1
200 *
201 */
202 {
203 .name = "DisplayBins1",
204 .start = 0x63B83000,
205 .end = 0x63B84000 - 1, /* 4 KB total */
206 .flags = IORESOURCE_IO,
207 },
208 /*
209 *
210 * AVFS: player HAL memory
211 *
212 *
213 */
214 {
215 .name = "AvfsDmaMem",
216 .start = 0x63B84000,
217 .end = 0x63E48C00 - 1, /* 945K * 3 for playback */
218 .flags = IORESOURCE_IO,
219 },
220 /*
221 *
222 * PMEM
223 *
224 * This driver requires:
225 *
226 * Arbitrary Based Buffers:
227 * Persistent memory for diagnostics.
228 *
229 */
230 {
231 .name = "DiagPersistentMemory",
232 .start = 0x00000000,
233 .end = 0x10000 - 1,
234 .flags = IORESOURCE_MEM,
235 },
236 /*
237 *
238 * Smartcard
239 *
240 * This driver requires:
241 *
242 * Arbitrary Based Buffers:
243 * Read and write buffers for Internal/External cards
244 *
245 */
246 {
247 .name = "SmartCardInfo",
248 .start = 0x63B80000,
249 .end = 0x63B82800 - 1,
250 .flags = IORESOURCE_IO,
251 },
252 /*
253 *
254 * KAVNET
255 * NP Reset Vector - must be of the form xxCxxxxx
256 * NP Image - must be video bank 1
257 * NP IPC - must be video bank 2
258 */
259 {
260 .name = "NP_Reset_Vector",
261 .start = 0x27c00000,
262 .end = 0x27c01000 - 1,
263 .flags = IORESOURCE_MEM,
264 },
265 {
266 .name = "NP_Image",
267 .start = 0x27020000,
268 .end = 0x27060000 - 1,
269 .flags = IORESOURCE_MEM,
270 },
271 {
272 .name = "NP_IPC",
273 .start = 0x63500000,
274 .end = 0x63580000 - 1,
275 .flags = IORESOURCE_IO,
276 },
277 /*
278 * NAND Flash
279 */
280 {
281 .name = "NandFlash",
282 .start = NAND_FLASH_BASE,
283 .end = NAND_FLASH_BASE + 0x400 - 1,
284 .flags = IORESOURCE_IO,
285 },
286 /*
287 * Add other resources here
288 */
289 { },
290};
diff --git a/arch/mips/powertv/asic/prealloc-zeus.c b/arch/mips/powertv/asic/prealloc-zeus.c
new file mode 100644
index 000000000000..018d4514dbe3
--- /dev/null
+++ b/arch/mips/powertv/asic/prealloc-zeus.c
@@ -0,0 +1,459 @@
1/*
2 * Memory pre-allocations for Zeus boxes.
3 *
4 * Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 *
20 * Author: Ken Eppinett
21 * David Schleef <ds@schleef.org>
22 */
23
24#include <linux/init.h>
25#include <asm/mach-powertv/asic.h>
26
27/*
28 * DVR_CAPABLE RESOURCES
29 */
30struct resource dvr_zeus_resources[] __initdata =
31{
32 /*
33 *
34 * VIDEO1 / LX1
35 *
36 */
37 {
38 .name = "ST231aImage", /* Delta-Mu 1 image and ram */
39 .start = 0x20000000,
40 .end = 0x201FFFFF, /* 2MiB */
41 .flags = IORESOURCE_IO,
42 },
43 {
44 .name = "ST231aMonitor", /* 8KiB block ST231a monitor */
45 .start = 0x20200000,
46 .end = 0x20201FFF,
47 .flags = IORESOURCE_IO,
48 },
49 {
50 .name = "MediaMemory1",
51 .start = 0x20202000,
52 .end = 0x21FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
53 .flags = IORESOURCE_IO,
54 },
55 /*
56 *
57 * VIDEO2 / LX2
58 *
59 */
60 {
61 .name = "ST231bImage", /* Delta-Mu 2 image and ram */
62 .start = 0x30000000,
63 .end = 0x301FFFFF, /* 2MiB */
64 .flags = IORESOURCE_IO,
65 },
66 {
67 .name = "ST231bMonitor", /* 8KiB block ST231b monitor */
68 .start = 0x30200000,
69 .end = 0x30201FFF,
70 .flags = IORESOURCE_IO,
71 },
72 {
73 .name = "MediaMemory2",
74 .start = 0x30202000,
75 .end = 0x31FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
76 .flags = IORESOURCE_IO,
77 },
78 /*
79 *
80 * Sysaudio Driver
81 *
82 * This driver requires:
83 *
84 * Arbitrary Based Buffers:
85 * DSP_Image_Buff - DSP code and data images (1MB)
86 * ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB)
87 * ADSC_AUX_Buff - ADSC AUX buffer (16KB)
88 * ADSC_Main_Buff - ADSC Main buffer (16KB)
89 *
90 */
91 {
92 .name = "DSP_Image_Buff",
93 .start = 0x00000000,
94 .end = 0x000FFFFF,
95 .flags = IORESOURCE_MEM,
96 },
97 {
98 .name = "ADSC_CPU_PCM_Buff",
99 .start = 0x00000000,
100 .end = 0x00009FFF,
101 .flags = IORESOURCE_MEM,
102 },
103 {
104 .name = "ADSC_AUX_Buff",
105 .start = 0x00000000,
106 .end = 0x00003FFF,
107 .flags = IORESOURCE_MEM,
108 },
109 {
110 .name = "ADSC_Main_Buff",
111 .start = 0x00000000,
112 .end = 0x00003FFF,
113 .flags = IORESOURCE_MEM,
114 },
115 /*
116 *
117 * STAVEM driver/STAPI
118 *
119 * This driver requires:
120 *
121 * Arbitrary Based Buffers:
122 * This memory area is used for allocating buffers for Video decoding
123 * purposes. Allocation/De-allocation within this buffer is managed
124 * by the STAVMEM driver of the STAPI. They could be Decimated
125 * Picture Buffers, Intermediate Buffers, as deemed necessary for
126 * video decoding purposes, for any video decoders on Zeus.
127 *
128 */
129 {
130 .name = "AVMEMPartition0",
131 .start = 0x00000000,
132 .end = 0x00c00000 - 1, /* 12 MB total */
133 .flags = IORESOURCE_MEM,
134 },
135 /*
136 *
137 * DOCSIS Subsystem
138 *
139 * This driver requires:
140 *
141 * Arbitrary Based Buffers:
142 * Docsis -
143 *
144 */
145 {
146 .name = "Docsis",
147 .start = 0x40100000,
148 .end = 0x407fffff,
149 .flags = IORESOURCE_MEM,
150 },
151 /*
152 *
153 * GHW HAL Driver
154 *
155 * This driver requires:
156 *
157 * Arbitrary Based Buffers:
158 * GraphicsHeap - PowerTV Graphics Heap
159 *
160 */
161 {
162 .name = "GraphicsHeap",
163 .start = 0x46900000,
164 .end = 0x47700000 - 1, /* 14 MB total */
165 .flags = IORESOURCE_MEM,
166 },
167 /*
168 *
169 * multi com buffer area
170 *
171 * This driver requires:
172 *
173 * Arbitrary Based Buffers:
174 * Docsis -
175 *
176 */
177 {
178 .name = "MulticomSHM",
179 .start = 0x47900000,
180 .end = 0x47920000 - 1,
181 .flags = IORESOURCE_MEM,
182 },
183 /*
184 *
185 * DMA Ring buffer
186 *
187 * This driver requires:
188 *
189 * Arbitrary Based Buffers:
190 * Docsis -
191 *
192 */
193 {
194 .name = "BMM_Buffer",
195 .start = 0x00000000,
196 .end = 0x00280000 - 1,
197 .flags = IORESOURCE_MEM,
198 },
199 /*
200 *
201 * Display bins buffer for unit0
202 *
203 * This driver requires:
204 *
205 * Arbitrary Based Buffers:
206 * Display Bins for unit0
207 *
208 */
209 {
210 .name = "DisplayBins0",
211 .start = 0x00000000,
212 .end = 0x00000FFF, /* 4 KB total */
213 .flags = IORESOURCE_MEM,
214 },
215 /*
216 *
217 * Display bins buffer
218 *
219 * This driver requires:
220 *
221 * Arbitrary Based Buffers:
222 * Display Bins for unit1
223 *
224 */
225 {
226 .name = "DisplayBins1",
227 .start = 0x00000000,
228 .end = 0x00000FFF, /* 4 KB total */
229 .flags = IORESOURCE_MEM,
230 },
231 /*
232 *
233 * ITFS
234 *
235 * This driver requires:
236 *
237 * Arbitrary Based Buffers:
238 * Docsis -
239 *
240 */
241 {
242 .name = "ITFS",
243 .start = 0x00000000,
244 /* 815,104 bytes each for 2 ITFS partitions. */
245 .end = 0x0018DFFF,
246 .flags = IORESOURCE_MEM,
247 },
248 /*
249 *
250 * AVFS
251 *
252 * This driver requires:
253 *
254 * Arbitrary Based Buffers:
255 * Docsis -
256 *
257 */
258 {
259 .name = "AvfsDmaMem",
260 .start = 0x00000000,
261 /* (945K * 8) = (128K * 3) 5 playbacks / 3 server */
262 .end = 0x007c2000 - 1,
263 .flags = IORESOURCE_MEM,
264 },
265 {
266 .name = "AvfsFileSys",
267 .start = 0x00000000,
268 .end = 0x00001000 - 1, /* 4K */
269 .flags = IORESOURCE_MEM,
270 },
271 /*
272 *
273 * PMEM
274 *
275 * This driver requires:
276 *
277 * Arbitrary Based Buffers:
278 * Persistent memory for diagnostics.
279 *
280 */
281 {
282 .name = "DiagPersistentMemory",
283 .start = 0x00000000,
284 .end = 0x10000 - 1,
285 .flags = IORESOURCE_MEM,
286 },
287 /*
288 *
289 * Smartcard
290 *
291 * This driver requires:
292 *
293 * Arbitrary Based Buffers:
294 * Read and write buffers for Internal/External cards
295 *
296 */
297 {
298 .name = "SmartCardInfo",
299 .start = 0x00000000,
300 .end = 0x2800 - 1,
301 .flags = IORESOURCE_MEM,
302 },
303 /*
304 * Add other resources here
305 */
306 { },
307};
308
309/*
310 * NON_DVR_CAPABLE ZEUS RESOURCES
311 */
312struct resource non_dvr_zeus_resources[] __initdata =
313{
314 /*
315 * VIDEO1 / LX1
316 */
317 {
318 .name = "ST231aImage", /* Delta-Mu 1 image and ram */
319 .start = 0x20000000,
320 .end = 0x201FFFFF, /* 2MiB */
321 .flags = IORESOURCE_IO,
322 },
323 {
324 .name = "ST231aMonitor", /* 8KiB block ST231a monitor */
325 .start = 0x20200000,
326 .end = 0x20201FFF,
327 .flags = IORESOURCE_IO,
328 },
329 {
330 .name = "MediaMemory1",
331 .start = 0x20202000,
332 .end = 0x21FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
333 .flags = IORESOURCE_IO,
334 },
335 /*
336 * Sysaudio Driver
337 */
338 {
339 .name = "DSP_Image_Buff",
340 .start = 0x00000000,
341 .end = 0x000FFFFF,
342 .flags = IORESOURCE_MEM,
343 },
344 {
345 .name = "ADSC_CPU_PCM_Buff",
346 .start = 0x00000000,
347 .end = 0x00009FFF,
348 .flags = IORESOURCE_MEM,
349 },
350 {
351 .name = "ADSC_AUX_Buff",
352 .start = 0x00000000,
353 .end = 0x00003FFF,
354 .flags = IORESOURCE_MEM,
355 },
356 {
357 .name = "ADSC_Main_Buff",
358 .start = 0x00000000,
359 .end = 0x00003FFF,
360 .flags = IORESOURCE_MEM,
361 },
362 /*
363 * STAVEM driver/STAPI
364 */
365 {
366 .name = "AVMEMPartition0",
367 .start = 0x00000000,
368 .end = 0x00600000 - 1, /* 6 MB total */
369 .flags = IORESOURCE_MEM,
370 },
371 /*
372 * DOCSIS Subsystem
373 */
374 {
375 .name = "Docsis",
376 .start = 0x40100000,
377 .end = 0x407fffff,
378 .flags = IORESOURCE_MEM,
379 },
380 /*
381 * GHW HAL Driver
382 */
383 {
384 .name = "GraphicsHeap",
385 .start = 0x46900000,
386 .end = 0x47700000 - 1, /* 14 MB total */
387 .flags = IORESOURCE_MEM,
388 },
389 /*
390 * multi com buffer area
391 */
392 {
393 .name = "MulticomSHM",
394 .start = 0x47900000,
395 .end = 0x47920000 - 1,
396 .flags = IORESOURCE_MEM,
397 },
398 /*
399 * DMA Ring buffer
400 */
401 {
402 .name = "BMM_Buffer",
403 .start = 0x00000000,
404 .end = 0x00280000 - 1,
405 .flags = IORESOURCE_MEM,
406 },
407 /*
408 * Display bins buffer for unit0
409 */
410 {
411 .name = "DisplayBins0",
412 .start = 0x00000000,
413 .end = 0x00000FFF, /* 4 KB total */
414 .flags = IORESOURCE_MEM,
415 },
416 /*
417 *
418 * AVFS: player HAL memory
419 *
420 *
421 */
422 {
423 .name = "AvfsDmaMem",
424 .start = 0x00000000,
425 .end = 0x002c4c00 - 1, /* 945K * 3 for playback */
426 .flags = IORESOURCE_MEM,
427 },
428 /*
429 * PMEM
430 */
431 {
432 .name = "DiagPersistentMemory",
433 .start = 0x00000000,
434 .end = 0x10000 - 1,
435 .flags = IORESOURCE_MEM,
436 },
437 /*
438 * Smartcard
439 */
440 {
441 .name = "SmartCardInfo",
442 .start = 0x00000000,
443 .end = 0x2800 - 1,
444 .flags = IORESOURCE_MEM,
445 },
446 /*
447 * NAND Flash
448 */
449 {
450 .name = "NandFlash",
451 .start = NAND_FLASH_BASE,
452 .end = NAND_FLASH_BASE + 0x400 - 1,
453 .flags = IORESOURCE_IO,
454 },
455 /*
456 * Add other resources here
457 */
458 { },
459};
diff --git a/arch/mips/powertv/cmdline.c b/arch/mips/powertv/cmdline.c
new file mode 100644
index 000000000000..98d73cb0d452
--- /dev/null
+++ b/arch/mips/powertv/cmdline.c
@@ -0,0 +1,52 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
4 * Portions copyright (C) 2009 Cisco Systems, Inc.
5 *
6 * This program is free software; you can distribute it and/or modify it
7 * under the terms of the GNU General Public License (Version 2) as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
18 *
19 * Kernel command line creation using the prom monitor (YAMON) argc/argv.
20 */
21#include <linux/init.h>
22#include <linux/string.h>
23
24#include <asm/bootinfo.h>
25
26#include "init.h"
27
28/*
29 * YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer.
30 * This macro take care of sign extension.
31 */
32#define prom_argv(index) ((char *)(long)_prom_argv[(index)])
33
34char * __init prom_getcmdline(void)
35{
36 return &(arcs_cmdline[0]);
37}
38
39void __init prom_init_cmdline(void)
40{
41 int len;
42
43 if (prom_argc != 1)
44 return;
45
46 len = strlen(arcs_cmdline);
47
48 arcs_cmdline[len] = ' ';
49
50 strlcpy(arcs_cmdline + len + 1, (char *)_prom_argv,
51 COMMAND_LINE_SIZE - len - 1);
52}
diff --git a/arch/mips/powertv/init.c b/arch/mips/powertv/init.c
new file mode 100644
index 000000000000..5f4e4c304e48
--- /dev/null
+++ b/arch/mips/powertv/init.c
@@ -0,0 +1,128 @@
1/*
2 * Copyright (C) 1999, 2000, 2004, 2005 MIPS Technologies, Inc.
3 * All rights reserved.
4 * Authors: Carsten Langgaard <carstenl@mips.com>
5 * Maciej W. Rozycki <macro@mips.com>
6 * Portions copyright (C) 2009 Cisco Systems, Inc.
7 *
8 * This program is free software; you can distribute it and/or modify it
9 * under the terms of the GNU General Public License (Version 2) as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
20 *
21 * PROM library initialisation code.
22 */
23#include <linux/init.h>
24#include <linux/string.h>
25#include <linux/kernel.h>
26
27#include <asm/bootinfo.h>
28#include <linux/io.h>
29#include <asm/system.h>
30#include <asm/cacheflush.h>
31#include <asm/traps.h>
32
33#include <asm/mips-boards/prom.h>
34#include <asm/mips-boards/generic.h>
35#include <asm/mach-powertv/asic.h>
36
37#include "init.h"
38
39int prom_argc;
40int *_prom_argv, *_prom_envp;
41unsigned long _prom_memsize;
42
43/*
44 * YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer.
45 * This macro take care of sign extension, if running in 64-bit mode.
46 */
47#define prom_envp(index) ((char *)(long)_prom_envp[(index)])
48
49char *prom_getenv(char *envname)
50{
51 char *result = NULL;
52
53 if (_prom_envp != NULL) {
54 /*
55 * Return a pointer to the given environment variable.
56 * In 64-bit mode: we're using 64-bit pointers, but all pointers
57 * in the PROM structures are only 32-bit, so we need some
58 * workarounds, if we are running in 64-bit mode.
59 */
60 int i, index = 0;
61
62 i = strlen(envname);
63
64 while (prom_envp(index)) {
65 if (strncmp(envname, prom_envp(index), i) == 0) {
66 result = prom_envp(index + 1);
67 break;
68 }
69 index += 2;
70 }
71 }
72
73 return result;
74}
75
76/* TODO: Verify on linux-mips mailing list that the following two */
77/* functions are correct */
78/* TODO: Copy NMI and EJTAG exception vectors to memory from the */
79/* BootROM exception vectors. Flush their cache entries. test it. */
80
81static void __init mips_nmi_setup(void)
82{
83 void *base;
84#if defined(CONFIG_CPU_MIPS32_R1)
85 base = cpu_has_veic ?
86 (void *)(CAC_BASE + 0xa80) :
87 (void *)(CAC_BASE + 0x380);
88#elif defined(CONFIG_CPU_MIPS32_R2)
89 base = (void *)0xbfc00000;
90#else
91#error NMI exception handler address not defined
92#endif
93}
94
95static void __init mips_ejtag_setup(void)
96{
97 void *base;
98
99#if defined(CONFIG_CPU_MIPS32_R1)
100 base = cpu_has_veic ?
101 (void *)(CAC_BASE + 0xa00) :
102 (void *)(CAC_BASE + 0x300);
103#elif defined(CONFIG_CPU_MIPS32_R2)
104 base = (void *)0xbfc00480;
105#else
106#error EJTAG exception handler address not defined
107#endif
108}
109
110void __init prom_init(void)
111{
112 prom_argc = fw_arg0;
113 _prom_argv = (int *) fw_arg1;
114 _prom_envp = (int *) fw_arg2;
115 _prom_memsize = (unsigned long) fw_arg3;
116
117 board_nmi_handler_setup = mips_nmi_setup;
118 board_ejtag_handler_setup = mips_ejtag_setup;
119
120 pr_info("\nLINUX started...\n");
121 prom_init_cmdline();
122 configure_platform();
123 prom_meminit();
124
125#ifndef CONFIG_BOOTLOADER_DRIVER
126 pr_info("\nBootloader driver isn't loaded...\n");
127#endif
128}
diff --git a/arch/mips/powertv/init.h b/arch/mips/powertv/init.h
new file mode 100644
index 000000000000..7af6bf25008c
--- /dev/null
+++ b/arch/mips/powertv/init.h
@@ -0,0 +1,28 @@
1/*
2 * Definitions from powertv init.c file
3 *
4 * Copyright (C) 2009 Cisco Systems, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 *
20 * Author: David VomLehn
21 */
22
23#ifndef _POWERTV_INIT_H
24#define _POWERTV_INIT_H
25extern int prom_argc;
26extern int *_prom_argv;
27extern unsigned long _prom_memsize;
28#endif
diff --git a/arch/mips/powertv/memory.c b/arch/mips/powertv/memory.c
new file mode 100644
index 000000000000..28d06605fff6
--- /dev/null
+++ b/arch/mips/powertv/memory.c
@@ -0,0 +1,186 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
4 * Portions copyright (C) 2009 Cisco Systems, Inc.
5 *
6 * This program is free software; you can distribute it and/or modify it
7 * under the terms of the GNU General Public License (Version 2) as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
18 *
19 * Apparently originally from arch/mips/malta-memory.c. Modified to work
20 * with the PowerTV bootloader.
21 */
22#include <linux/init.h>
23#include <linux/mm.h>
24#include <linux/bootmem.h>
25#include <linux/pfn.h>
26#include <linux/string.h>
27
28#include <asm/bootinfo.h>
29#include <asm/page.h>
30#include <asm/sections.h>
31
32#include <asm/mips-boards/prom.h>
33
34#include "init.h"
35
36/* Memory constants */
37#define KIBIBYTE(n) ((n) * 1024) /* Number of kibibytes */
38#define MEBIBYTE(n) ((n) * KIBIBYTE(1024)) /* Number of mebibytes */
39#define DEFAULT_MEMSIZE MEBIBYTE(256) /* If no memsize provided */
40#define LOW_MEM_MAX MEBIBYTE(252) /* Max usable low mem */
41#define RES_BOOTLDR_MEMSIZE MEBIBYTE(1) /* Memory reserved for bldr */
42#define BOOT_MEM_SIZE KIBIBYTE(256) /* Memory reserved for bldr */
43#define PHYS_MEM_START 0x10000000 /* Start of physical memory */
44
45unsigned long ptv_memsize;
46
47char __initdata cmdline[COMMAND_LINE_SIZE];
48
49void __init prom_meminit(void)
50{
51 char *memsize_str;
52 unsigned long memsize = 0;
53 unsigned int physend;
54 char *ptr;
55 int low_mem;
56 int high_mem;
57
58 /* Check the command line first for a memsize directive */
59 strcpy(cmdline, arcs_cmdline);
60 ptr = strstr(cmdline, "memsize=");
61 if (ptr && (ptr != cmdline) && (*(ptr - 1) != ' '))
62 ptr = strstr(ptr, " memsize=");
63
64 if (ptr) {
65 memsize = memparse(ptr + 8, &ptr);
66 } else {
67 /* otherwise look in the environment */
68 memsize_str = prom_getenv("memsize");
69
70 if (memsize_str != NULL) {
71 pr_info("prom memsize = %s\n", memsize_str);
72 memsize = simple_strtol(memsize_str, NULL, 0);
73 }
74
75 if (memsize == 0) {
76 if (_prom_memsize != 0) {
77 memsize = _prom_memsize;
78 pr_info("_prom_memsize = 0x%lx\n", memsize);
79 /* add in memory that the bootloader doesn't
80 * report */
81 memsize += BOOT_MEM_SIZE;
82 } else {
83 memsize = DEFAULT_MEMSIZE;
84 pr_info("Memsize not passed by bootloader, "
85 "defaulting to 0x%lx\n", memsize);
86 }
87 }
88 }
89
90 /* Store memsize for diagnostic purposes */
91 ptv_memsize = memsize;
92
93 physend = PFN_ALIGN(&_end) - 0x80000000;
94 if (memsize > LOW_MEM_MAX) {
95 low_mem = LOW_MEM_MAX;
96 high_mem = memsize - low_mem;
97 } else {
98 low_mem = memsize;
99 high_mem = 0;
100 }
101
102/*
103 * TODO: We will use the hard code for memory configuration until
104 * the bootloader releases their device tree to us.
105 */
106 /*
107 * Add the memory reserved for use by the bootloader to the
108 * memory map.
109 */
110 add_memory_region(PHYS_MEM_START, RES_BOOTLDR_MEMSIZE,
111 BOOT_MEM_RESERVED);
112#ifdef CONFIG_HIGHMEM_256_128
113 /*
114 * Add memory in low for general use by the kernel and its friends
115 * (like drivers, applications, etc).
116 */
117 add_memory_region(PHYS_MEM_START + RES_BOOTLDR_MEMSIZE,
118 LOW_MEM_MAX - RES_BOOTLDR_MEMSIZE, BOOT_MEM_RAM);
119 /*
120 * Add the memory reserved for reset vector.
121 */
122 add_memory_region(0x1fc00000, MEBIBYTE(4), BOOT_MEM_RESERVED);
123 /*
124 * Add the memory reserved.
125 */
126 add_memory_region(0x20000000, MEBIBYTE(1024 + 75), BOOT_MEM_RESERVED);
127 /*
128 * Add memory in high for general use by the kernel and its friends
129 * (like drivers, applications, etc).
130 *
131 * 75MB is reserved for devices which are using the memory in high.
132 */
133 add_memory_region(0x60000000 + MEBIBYTE(75), MEBIBYTE(128 - 75),
134 BOOT_MEM_RAM);
135#elif defined CONFIG_HIGHMEM_128_128
136 /*
137 * Add memory in low for general use by the kernel and its friends
138 * (like drivers, applications, etc).
139 */
140 add_memory_region(PHYS_MEM_START + RES_BOOTLDR_MEMSIZE,
141 MEBIBYTE(128) - RES_BOOTLDR_MEMSIZE, BOOT_MEM_RAM);
142 /*
143 * Add the memory reserved.
144 */
145 add_memory_region(PHYS_MEM_START + MEBIBYTE(128),
146 MEBIBYTE(128 + 1024 + 75), BOOT_MEM_RESERVED);
147 /*
148 * Add memory in high for general use by the kernel and its friends
149 * (like drivers, applications, etc).
150 *
151 * 75MB is reserved for devices which are using the memory in high.
152 */
153 add_memory_region(0x60000000 + MEBIBYTE(75), MEBIBYTE(128 - 75),
154 BOOT_MEM_RAM);
155#else
156 /* Add low memory regions for either:
157 * - no-highmemory configuration case -OR-
158 * - highmemory "HIGHMEM_LOWBANK_ONLY" case
159 */
160 /*
161 * Add memory for general use by the kernel and its friends
162 * (like drivers, applications, etc).
163 */
164 add_memory_region(PHYS_MEM_START + RES_BOOTLDR_MEMSIZE,
165 low_mem - RES_BOOTLDR_MEMSIZE, BOOT_MEM_RAM);
166 /*
167 * Add the memory reserved for reset vector.
168 */
169 add_memory_region(0x1fc00000, MEBIBYTE(4), BOOT_MEM_RESERVED);
170#endif
171}
172
173void __init prom_free_prom_memory(void)
174{
175 unsigned long addr;
176 int i;
177
178 for (i = 0; i < boot_mem_map.nr_map; i++) {
179 if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA)
180 continue;
181
182 addr = boot_mem_map.map[i].addr;
183 free_init_pages("prom memory",
184 addr, addr + boot_mem_map.map[i].size);
185 }
186}
diff --git a/arch/mips/powertv/pci/Makefile b/arch/mips/powertv/pci/Makefile
new file mode 100644
index 000000000000..f5c62462fc9d
--- /dev/null
+++ b/arch/mips/powertv/pci/Makefile
@@ -0,0 +1,21 @@
1#
2# Copyright (C) 2009 Scientific-Atlanta, Inc.
3#
4# This program is free software; you can redistribute it and/or modify
5# it under the terms of the GNU General Public License as published by
6# the Free Software Foundation; either version 2 of the License, or
7# (at your option) any later version.
8#
9# This program is distributed in the hope that it will be useful,
10# but WITHOUT ANY WARRANTY; without even the implied warranty of
11# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12# GNU General Public License for more details.
13#
14# You should have received a copy of the GNU General Public License
15# along with this program; if not, write to the Free Software
16# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
17#
18
19obj-$(CONFIG_PCI) += fixup-powertv.o
20
21EXTRA_CFLAGS += -Wall -Werror
diff --git a/arch/mips/powertv/pci/fixup-powertv.c b/arch/mips/powertv/pci/fixup-powertv.c
new file mode 100644
index 000000000000..726bc2e824b3
--- /dev/null
+++ b/arch/mips/powertv/pci/fixup-powertv.c
@@ -0,0 +1,36 @@
1#include <linux/init.h>
2#include <linux/pci.h>
3#include <asm/mach-powertv/interrupts.h>
4#include "powertv-pci.h"
5
6int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
7{
8 return asic_pcie_map_irq(dev, slot, pin);
9}
10
11/* Do platform specific device initialization at pci_enable_device() time */
12int pcibios_plat_dev_init(struct pci_dev *dev)
13{
14 return 0;
15}
16
17/*
18 * asic_pcie_map_irq
19 *
20 * Parameters:
21 * *dev - pointer to a pci_dev structure (not used)
22 * slot - slot number (not used)
23 * pin - pin number (not used)
24 *
25 * Return Value:
26 * Returns: IRQ number (always the PCI Express IRQ number)
27 *
28 * Description:
29 * asic_pcie_map_irq will return the IRQ number of the PCI Express interrupt.
30 *
31 */
32int asic_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
33{
34 return irq_pciexp;
35}
36EXPORT_SYMBOL(asic_pcie_map_irq);
diff --git a/arch/mips/powertv/pci/powertv-pci.h b/arch/mips/powertv/pci/powertv-pci.h
new file mode 100644
index 000000000000..1b5886bbd759
--- /dev/null
+++ b/arch/mips/powertv/pci/powertv-pci.h
@@ -0,0 +1,31 @@
1/*
2 * powertv-pci.c
3 *
4 * Copyright (C) 2009 Cisco Systems, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20/*
21 * Local definitions for the powertv PCI code
22 */
23
24#ifndef _POWERTV_PCI_POWERTV_PCI_H_
25#define _POWERTV_PCI_POWERTV_PCI_H_
26extern int asic_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
27extern int asic_pcie_init(void);
28extern int asic_pcie_init(void);
29
30extern int log_level;
31#endif
diff --git a/arch/mips/powertv/powertv-clock.h b/arch/mips/powertv/powertv-clock.h
new file mode 100644
index 000000000000..d94c54311485
--- /dev/null
+++ b/arch/mips/powertv/powertv-clock.h
@@ -0,0 +1,26 @@
1/*
2 * Copyright (C) 2009 Cisco Systems, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
17 *
18 * Author: David VomLehn
19 */
20
21#ifndef _POWERTV_POWERTV_CLOCK_H
22#define _POWERTV_POWERTV_CLOCK_H
23extern int powertv_clockevent_init(void);
24extern void powertv_clocksource_init(void);
25extern unsigned int mips_get_pll_freq(void);
26#endif
diff --git a/arch/mips/powertv/powertv_setup.c b/arch/mips/powertv/powertv_setup.c
new file mode 100644
index 000000000000..bd8ebf128f29
--- /dev/null
+++ b/arch/mips/powertv/powertv_setup.c
@@ -0,0 +1,351 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
4 * Portions copyright (C) 2009 Cisco Systems, Inc.
5 *
6 * This program is free software; you can distribute it and/or modify it
7 * under the terms of the GNU General Public License (Version 2) as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
18 */
19#include <linux/init.h>
20#include <linux/sched.h>
21#include <linux/ioport.h>
22#include <linux/pci.h>
23#include <linux/screen_info.h>
24#include <linux/notifier.h>
25#include <linux/etherdevice.h>
26#include <linux/if_ether.h>
27#include <linux/ctype.h>
28
29#include <linux/cpu.h>
30#include <asm/bootinfo.h>
31#include <asm/irq.h>
32#include <asm/mips-boards/generic.h>
33#include <asm/mips-boards/prom.h>
34#include <asm/dma.h>
35#include <linux/time.h>
36#include <asm/traps.h>
37#include <asm/asm-offsets.h>
38#include "reset.h"
39
40#define VAL(n) STR(n)
41
42/*
43 * Macros for loading addresses and storing registers:
44 * PTR_LA Load the address into a register
45 * LONG_S Store the full width of the given register.
46 * LONG_L Load the full width of the given register
47 * PTR_ADDIU Add a constant value to a register used as a pointer
48 * REG_SIZE Number of 8-bit bytes in a full width register
49 */
50#ifdef CONFIG_64BIT
51#warning TODO: 64-bit code needs to be verified
52#define PTR_LA "dla "
53#define LONG_S "sd "
54#define LONG_L "ld "
55#define PTR_ADDIU "daddiu "
56#define REG_SIZE "8" /* In bytes */
57#endif
58
59#ifdef CONFIG_32BIT
60#define PTR_LA "la "
61#define LONG_S "sw "
62#define LONG_L "lw "
63#define PTR_ADDIU "addiu "
64#define REG_SIZE "4" /* In bytes */
65#endif
66
67static struct pt_regs die_regs;
68static bool have_die_regs;
69
70static void register_panic_notifier(void);
71static int panic_handler(struct notifier_block *notifier_block,
72 unsigned long event, void *cause_string);
73
74const char *get_system_type(void)
75{
76 return "PowerTV";
77}
78
79void __init plat_mem_setup(void)
80{
81 panic_on_oops = 1;
82 register_panic_notifier();
83
84#if 0
85 mips_pcibios_init();
86#endif
87 mips_reboot_setup();
88}
89
90/*
91 * Install a panic notifier for platform-specific diagnostics
92 */
93static void register_panic_notifier()
94{
95 static struct notifier_block panic_notifier = {
96 .notifier_call = panic_handler,
97 .next = NULL,
98 .priority = INT_MAX
99 };
100 atomic_notifier_chain_register(&panic_notifier_list, &panic_notifier);
101}
102
103static int panic_handler(struct notifier_block *notifier_block,
104 unsigned long event, void *cause_string)
105{
106 struct pt_regs my_regs;
107
108 /* Save all of the registers */
109 {
110 unsigned long at, v0, v1; /* Must be on the stack */
111
112 /* Start by saving $at and v0 on the stack. We use $at
113 * ourselves, but it looks like the compiler may use v0 or v1
114 * to load the address of the pt_regs structure. We'll come
115 * back later to store the registers in the pt_regs
116 * structure. */
117 __asm__ __volatile__ (
118 ".set noat\n"
119 LONG_S "$at, %[at]\n"
120 LONG_S "$2, %[v0]\n"
121 LONG_S "$3, %[v1]\n"
122 :
123 [at] "=m" (at),
124 [v0] "=m" (v0),
125 [v1] "=m" (v1)
126 :
127 : "at"
128 );
129
130 __asm__ __volatile__ (
131 ".set noat\n"
132 "move $at, %[pt_regs]\n"
133
134 /* Argument registers */
135 LONG_S "$4, " VAL(PT_R4) "($at)\n"
136 LONG_S "$5, " VAL(PT_R5) "($at)\n"
137 LONG_S "$6, " VAL(PT_R6) "($at)\n"
138 LONG_S "$7, " VAL(PT_R7) "($at)\n"
139
140 /* Temporary regs */
141 LONG_S "$8, " VAL(PT_R8) "($at)\n"
142 LONG_S "$9, " VAL(PT_R9) "($at)\n"
143 LONG_S "$10, " VAL(PT_R10) "($at)\n"
144 LONG_S "$11, " VAL(PT_R11) "($at)\n"
145 LONG_S "$12, " VAL(PT_R12) "($at)\n"
146 LONG_S "$13, " VAL(PT_R13) "($at)\n"
147 LONG_S "$14, " VAL(PT_R14) "($at)\n"
148 LONG_S "$15, " VAL(PT_R15) "($at)\n"
149
150 /* "Saved" registers */
151 LONG_S "$16, " VAL(PT_R16) "($at)\n"
152 LONG_S "$17, " VAL(PT_R17) "($at)\n"
153 LONG_S "$18, " VAL(PT_R18) "($at)\n"
154 LONG_S "$19, " VAL(PT_R19) "($at)\n"
155 LONG_S "$20, " VAL(PT_R20) "($at)\n"
156 LONG_S "$21, " VAL(PT_R21) "($at)\n"
157 LONG_S "$22, " VAL(PT_R22) "($at)\n"
158 LONG_S "$23, " VAL(PT_R23) "($at)\n"
159
160 /* Add'l temp regs */
161 LONG_S "$24, " VAL(PT_R24) "($at)\n"
162 LONG_S "$25, " VAL(PT_R25) "($at)\n"
163
164 /* Kernel temp regs */
165 LONG_S "$26, " VAL(PT_R26) "($at)\n"
166 LONG_S "$27, " VAL(PT_R27) "($at)\n"
167
168 /* Global pointer, stack pointer, frame pointer and
169 * return address */
170 LONG_S "$gp, " VAL(PT_R28) "($at)\n"
171 LONG_S "$sp, " VAL(PT_R29) "($at)\n"
172 LONG_S "$fp, " VAL(PT_R30) "($at)\n"
173 LONG_S "$ra, " VAL(PT_R31) "($at)\n"
174
175 /* Now we can get the $at and v0 registers back and
176 * store them */
177 LONG_L "$8, %[at]\n"
178 LONG_S "$8, " VAL(PT_R1) "($at)\n"
179 LONG_L "$8, %[v0]\n"
180 LONG_S "$8, " VAL(PT_R2) "($at)\n"
181 LONG_L "$8, %[v1]\n"
182 LONG_S "$8, " VAL(PT_R3) "($at)\n"
183 :
184 :
185 [at] "m" (at),
186 [v0] "m" (v0),
187 [v1] "m" (v1),
188 [pt_regs] "r" (&my_regs)
189 : "at", "t0"
190 );
191
192 /* Set the current EPC value to be the current location in this
193 * function */
194 __asm__ __volatile__ (
195 ".set noat\n"
196 "1:\n"
197 PTR_LA "$at, 1b\n"
198 LONG_S "$at, %[cp0_epc]\n"
199 :
200 [cp0_epc] "=m" (my_regs.cp0_epc)
201 :
202 : "at"
203 );
204
205 my_regs.cp0_cause = read_c0_cause();
206 my_regs.cp0_status = read_c0_status();
207 }
208
209#ifdef CONFIG_DIAGNOSTICS
210 failure_report((char *) cause_string,
211 have_die_regs ? &die_regs : &my_regs);
212 have_die_regs = false;
213#else
214 pr_crit("I'm feeling a bit sleepy. hmmmmm... perhaps a nap would... "
215 "zzzz... \n");
216#endif
217
218 return NOTIFY_DONE;
219}
220
221/**
222 * Platform-specific handling of oops
223 * @str: Pointer to the oops string
224 * @regs: Pointer to the oops registers
225 * All we do here is to save the registers for subsequent printing through
226 * the panic notifier.
227 */
228void platform_die(const char *str, const struct pt_regs *regs)
229{
230 /* If we already have saved registers, don't overwrite them as they
231 * they apply to the initial fault */
232
233 if (!have_die_regs) {
234 have_die_regs = true;
235 die_regs = *regs;
236 }
237}
238
239/* Information about the RF MAC address, if one was supplied on the
240 * command line. */
241static bool have_rfmac;
242static u8 rfmac[ETH_ALEN];
243
244static int rfmac_param(char *p)
245{
246 u8 *q;
247 bool is_high_nibble;
248 int c;
249
250 /* Skip a leading "0x", if present */
251 if (*p == '0' && *(p+1) == 'x')
252 p += 2;
253
254 q = rfmac;
255 is_high_nibble = true;
256
257 for (c = (unsigned char) *p++;
258 isxdigit(c) && q - rfmac < ETH_ALEN;
259 c = (unsigned char) *p++) {
260 int nibble;
261
262 nibble = (isdigit(c) ? (c - '0') :
263 (isupper(c) ? c - 'A' + 10 : c - 'a' + 10));
264
265 if (is_high_nibble)
266 *q = nibble << 4;
267 else
268 *q++ |= nibble;
269
270 is_high_nibble = !is_high_nibble;
271 }
272
273 /* If we parsed all the way to the end of the parameter value and
274 * parsed all ETH_ALEN bytes, we have a usable RF MAC address */
275 have_rfmac = (c == '\0' && q - rfmac == ETH_ALEN);
276
277 return 0;
278}
279
280early_param("rfmac", rfmac_param);
281
282/*
283 * Generate an Ethernet MAC address that has a good chance of being unique.
284 * @addr: Pointer to six-byte array containing the Ethernet address
285 * Generates an Ethernet MAC address that is highly likely to be unique for
286 * this particular system on a network with other systems of the same type.
287 *
288 * The problem we are solving is that, when random_ether_addr() is used to
289 * generate MAC addresses at startup, there isn't much entropy for the random
290 * number generator to use and the addresses it produces are fairly likely to
291 * be the same as those of other identical systems on the same local network.
292 * This is true even for relatively small numbers of systems (for the reason
293 * why, see the Wikipedia entry for "Birthday problem" at:
294 * http://en.wikipedia.org/wiki/Birthday_problem
295 *
296 * The good news is that we already have a MAC address known to be unique, the
297 * RF MAC address. The bad news is that this address is already in use on the
298 * RF interface. Worse, the obvious trick, taking the RF MAC address and
299 * turning on the locally managed bit, has already been used for other devices.
300 * Still, this does give us something to work with.
301 *
302 * The approach we take is:
303 * 1. If we can't get the RF MAC Address, just call random_ether_addr.
304 * 2. Use the 24-bit NIC-specific bits of the RF MAC address as the last 24
305 * bits of the new address. This is very likely to be unique, except for
306 * the current box.
307 * 3. To avoid using addresses already on the current box, we set the top
308 * six bits of the address with a value different from any currently
309 * registered Scientific Atlanta organizationally unique identifyer
310 * (OUI). This avoids duplication with any addresses on the system that
311 * were generated from valid Scientific Atlanta-registered address by
312 * simply flipping the locally managed bit.
313 * 4. We aren't generating a multicast address, so we leave the multicast
314 * bit off. Since we aren't using a registered address, we have to set
315 * the locally managed bit.
316 * 5. We then randomly generate the remaining 16-bits. This does two
317 * things:
318 * a. It allows us to call this function for more than one device
319 * in this system
320 * b. It ensures that things will probably still work even if
321 * some device on the device network has a locally managed
322 * address that matches the top six bits from step 2.
323 */
324void platform_random_ether_addr(u8 addr[ETH_ALEN])
325{
326 const int num_random_bytes = 2;
327 const unsigned char non_sciatl_oui_bits = 0xc0u;
328 const unsigned char mac_addr_locally_managed = (1 << 1);
329
330 if (!have_rfmac) {
331 pr_warning("rfmac not available on command line; "
332 "generating random MAC address\n");
333 random_ether_addr(addr);
334 }
335
336 else {
337 int i;
338
339 /* Set the first byte to something that won't match a Scientific
340 * Atlanta OUI, is locally managed, and isn't a multicast
341 * address */
342 addr[0] = non_sciatl_oui_bits | mac_addr_locally_managed;
343
344 /* Get some bytes of random address information */
345 get_random_bytes(&addr[1], num_random_bytes);
346
347 /* Copy over the NIC-specific bits of the RF MAC address */
348 for (i = 1 + num_random_bytes; i < ETH_ALEN; i++)
349 addr[i] = rfmac[i];
350 }
351}
diff --git a/arch/mips/powertv/reset.c b/arch/mips/powertv/reset.c
new file mode 100644
index 000000000000..494c652c984b
--- /dev/null
+++ b/arch/mips/powertv/reset.c
@@ -0,0 +1,65 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
4 * Portions copyright (C) 2009 Cisco Systems, Inc.
5 *
6 * This program is free software; you can distribute it and/or modify it
7 * under the terms of the GNU General Public License (Version 2) as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
18 */
19#include <linux/pm.h>
20
21#include <linux/io.h>
22#include <asm/reboot.h> /* Not included by linux/reboot.h */
23
24#ifdef CONFIG_BOOTLOADER_DRIVER
25#include <asm/mach-powertv/kbldr.h>
26#endif
27
28#include <asm/mach-powertv/asic_regs.h>
29#include "reset.h"
30
31static void mips_machine_restart(char *command);
32static void mips_machine_halt(void);
33
34static void mips_machine_restart(char *command)
35{
36#ifdef CONFIG_BOOTLOADER_DRIVER
37 /*
38 * Call the bootloader's reset function to ensure
39 * that persistent data is flushed before hard reset
40 */
41 kbldr_SetCauseAndReset();
42#else
43 writel(0x1, asic_reg_addr(watchdog));
44#endif
45}
46
47static void mips_machine_halt(void)
48{
49#ifdef CONFIG_BOOTLOADER_DRIVER
50 /*
51 * Call the bootloader's reset function to ensure
52 * that persistent data is flushed before hard reset
53 */
54 kbldr_SetCauseAndReset();
55#else
56 writel(0x1, asic_reg_addr(watchdog));
57#endif
58}
59
60void mips_reboot_setup(void)
61{
62 _machine_restart = mips_machine_restart;
63 _machine_halt = mips_machine_halt;
64 pm_power_off = mips_machine_halt;
65}
diff --git a/arch/mips/powertv/reset.h b/arch/mips/powertv/reset.h
new file mode 100644
index 000000000000..888fd09e2620
--- /dev/null
+++ b/arch/mips/powertv/reset.h
@@ -0,0 +1,26 @@
1/*
2 * Definitions from powertv reset.c file
3 *
4 * Copyright (C) 2009 Cisco Systems, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 *
20 * Author: David VomLehn
21 */
22
23#ifndef _POWERTV_POWERTV_RESET_H
24#define _POWERTV_POWERTV_RESET_H
25extern void mips_reboot_setup(void);
26#endif
diff --git a/arch/mips/powertv/time.c b/arch/mips/powertv/time.c
new file mode 100644
index 000000000000..1e0a5ef4c8c7
--- /dev/null
+++ b/arch/mips/powertv/time.c
@@ -0,0 +1,37 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
4 * Portions copyright (C) 2009 Cisco Systems, Inc.
5 *
6 * This program is free software; you can distribute it and/or modify it
7 * under the terms of the GNU General Public License (Version 2) as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
18 *
19 * Setting up the clock on the MIPS boards.
20 */
21
22#include <linux/init.h>
23#include <asm/mach-powertv/interrupts.h>
24#include <asm/time.h>
25
26#include "powertv-clock.h"
27
28unsigned int __cpuinit get_c0_compare_int(void)
29{
30 return irq_mips_timer;
31}
32
33void __init plat_time_init(void)
34{
35 powertv_clocksource_init();
36 r4k_clockevent_init();
37}
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-17 05:03:46 -0500