diff options
author | Shane McDonald <mcdonald.shane@gmail.com> | 2010-05-07 02:02:09 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2010-05-21 16:31:17 -0400 |
commit | 3f135530448104c01153fe048024366203196798 (patch) | |
tree | b7b9b5bec5cba35276930bfa5f3022ea81785649 /arch/mips/powertv/asic/prealloc-zeus.c | |
parent | c197da9163a42e6faeb051f331868b9245836eef (diff) |
MIPS: Coding style cleanups of access of FCSR rounding mode bits
Replaces references to the magic number 0x3 with constants and macros
indicating the real purpose of those bits. They are the rounding mode
bits of the FCSR register.
Signed-off-by: Shane McDonald <mcdonald.shane@gmail.com>
To: anemo@mba.ocn.ne.jp
To: kevink@paralogos.com
To: linux-mips@linux-mips.org
To: sshtylyov@mvista.com
Patchwork: http://patchwork.linux-mips.org/patch/1206/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/powertv/asic/prealloc-zeus.c')
0 files changed, 0 insertions, 0 deletions