diff options
author | Wu Zhangjin <wuzj@lemote.com> | 2009-06-04 08:27:10 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2009-06-17 06:06:31 -0400 |
commit | 363c55cae53742f3f685a1814912c6d4fda245b4 (patch) | |
tree | 3be662ed49bbc90c80c9faa5e71176209989d2ea /arch/mips/power/cpu.c | |
parent | 4bb1a1089e321d685967032497f4363081eab3a9 (diff) |
MIPS: Add hibernation support
[Ralf: SMP support requires CPU hotplugging which MIPS currently doesn't
support. As implemented in this patch cache and tlb flushing will also be
invoked with interrupts disabled so smp_call_function() will blow up in
charming ways. So limit to !SMP.]
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Reviewed-by: Yan Hua <yanh@lemote.com>
Reviewed-by: Arnaud Patard <apatard@mandriva.com>
Reviewed-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Wu Zhangjin <wuzj@lemote.com>
Signed-off-by: Hu Hongbing <huhb@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/power/cpu.c')
-rw-r--r-- | arch/mips/power/cpu.c | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/mips/power/cpu.c b/arch/mips/power/cpu.c new file mode 100644 index 000000000000..7995df45dc8d --- /dev/null +++ b/arch/mips/power/cpu.c | |||
@@ -0,0 +1,43 @@ | |||
1 | /* | ||
2 | * Suspend support specific for mips. | ||
3 | * | ||
4 | * Licensed under the GPLv2 | ||
5 | * | ||
6 | * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology | ||
7 | * Author: Hu Hongbing <huhb@lemote.com> | ||
8 | * Wu Zhangjin <wuzj@lemote.com> | ||
9 | */ | ||
10 | #include <asm/suspend.h> | ||
11 | #include <asm/fpu.h> | ||
12 | #include <asm/dsp.h> | ||
13 | |||
14 | static u32 saved_status; | ||
15 | struct pt_regs saved_regs; | ||
16 | |||
17 | void save_processor_state(void) | ||
18 | { | ||
19 | saved_status = read_c0_status(); | ||
20 | |||
21 | if (is_fpu_owner()) | ||
22 | save_fp(current); | ||
23 | if (cpu_has_dsp) | ||
24 | save_dsp(current); | ||
25 | } | ||
26 | |||
27 | void restore_processor_state(void) | ||
28 | { | ||
29 | write_c0_status(saved_status); | ||
30 | |||
31 | if (is_fpu_owner()) | ||
32 | restore_fp(current); | ||
33 | if (cpu_has_dsp) | ||
34 | restore_dsp(current); | ||
35 | } | ||
36 | |||
37 | int pfn_is_nosave(unsigned long pfn) | ||
38 | { | ||
39 | unsigned long nosave_begin_pfn = PFN_DOWN(__pa(&__nosave_begin)); | ||
40 | unsigned long nosave_end_pfn = PFN_UP(__pa(&__nosave_end)); | ||
41 | |||
42 | return (pfn >= nosave_begin_pfn) && (pfn < nosave_end_pfn); | ||
43 | } | ||