diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2006-10-07 14:44:33 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2006-10-07 21:38:28 -0400 |
commit | 937a801576f954bd030d7c4a5a94571710d87c0b (patch) | |
tree | 48d3440f765b56cf32a89b4b8193dd033d8227a8 /arch/mips/pmc-sierra | |
parent | 31aa36658a123263a9a69896e348b9600e050679 (diff) |
[MIPS] Complete fixes after removal of pt_regs argument to int handlers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pmc-sierra')
-rw-r--r-- | arch/mips/pmc-sierra/yosemite/irq.c | 54 | ||||
-rw-r--r-- | arch/mips/pmc-sierra/yosemite/smp.c | 2 |
2 files changed, 12 insertions, 44 deletions
diff --git a/arch/mips/pmc-sierra/yosemite/irq.c b/arch/mips/pmc-sierra/yosemite/irq.c index b91d0aa3b7ed..adb048527e76 100644 --- a/arch/mips/pmc-sierra/yosemite/irq.c +++ b/arch/mips/pmc-sierra/yosemite/irq.c | |||
@@ -56,15 +56,13 @@ | |||
56 | #define HYPERTRANSPORT_INTC 0x7a /* INTC# */ | 56 | #define HYPERTRANSPORT_INTC 0x7a /* INTC# */ |
57 | #define HYPERTRANSPORT_INTD 0x7b /* INTD# */ | 57 | #define HYPERTRANSPORT_INTD 0x7b /* INTD# */ |
58 | 58 | ||
59 | extern void jaguar_mailbox_irq(struct pt_regs *); | ||
60 | |||
61 | /* | 59 | /* |
62 | * Handle hypertransport & SMP interrupts. The interrupt lines are scarce. | 60 | * Handle hypertransport & SMP interrupts. The interrupt lines are scarce. |
63 | * For interprocessor interrupts, the best thing to do is to use the INTMSG | 61 | * For interprocessor interrupts, the best thing to do is to use the INTMSG |
64 | * register. We use the same external interrupt line, i.e. INTB3 and monitor | 62 | * register. We use the same external interrupt line, i.e. INTB3 and monitor |
65 | * another status bit | 63 | * another status bit |
66 | */ | 64 | */ |
67 | asmlinkage void ll_ht_smp_irq_handler(int irq, struct pt_regs *regs) | 65 | static void ll_ht_smp_irq_handler(int irq) |
68 | { | 66 | { |
69 | u32 status = OCD_READ(RM9000x2_OCD_INTP0STATUS4); | 67 | u32 status = OCD_READ(RM9000x2_OCD_INTP0STATUS4); |
70 | 68 | ||
@@ -107,50 +105,35 @@ asmlinkage void ll_ht_smp_irq_handler(int irq, struct pt_regs *regs) | |||
107 | } | 105 | } |
108 | #endif /* CONFIG_HT_LEVEL_TRIGGER */ | 106 | #endif /* CONFIG_HT_LEVEL_TRIGGER */ |
109 | 107 | ||
110 | do_IRQ(irq, regs); | 108 | do_IRQ(irq); |
111 | } | ||
112 | |||
113 | asmlinkage void do_extended_irq(struct pt_regs *regs) | ||
114 | { | ||
115 | unsigned int intcontrol = read_c0_intcontrol(); | ||
116 | unsigned int cause = read_c0_cause(); | ||
117 | unsigned int status = read_c0_status(); | ||
118 | unsigned int pending_sr, pending_ic; | ||
119 | |||
120 | pending_sr = status & cause & 0xff00; | ||
121 | pending_ic = (cause >> 8) & intcontrol & 0xff00; | ||
122 | |||
123 | if (pending_ic & (1 << 13)) | ||
124 | do_IRQ(13, regs); | ||
125 | |||
126 | } | 109 | } |
127 | 110 | ||
128 | asmlinkage void plat_irq_dispatch(struct pt_regs *regs) | 111 | asmlinkage void plat_irq_dispatch(void) |
129 | { | 112 | { |
130 | unsigned int cause = read_c0_cause(); | 113 | unsigned int cause = read_c0_cause(); |
131 | unsigned int status = read_c0_status(); | 114 | unsigned int status = read_c0_status(); |
132 | unsigned int pending = cause & status; | 115 | unsigned int pending = cause & status; |
133 | 116 | ||
134 | if (pending & STATUSF_IP7) { | 117 | if (pending & STATUSF_IP7) { |
135 | do_IRQ(7, regs); | 118 | do_IRQ(7); |
136 | } else if (pending & STATUSF_IP2) { | 119 | } else if (pending & STATUSF_IP2) { |
137 | #ifdef CONFIG_HYPERTRANSPORT | 120 | #ifdef CONFIG_HYPERTRANSPORT |
138 | ll_ht_smp_irq_handler(2, regs); | 121 | ll_ht_smp_irq_handler(2); |
139 | #else | 122 | #else |
140 | do_IRQ(2, regs); | 123 | do_IRQ(2); |
141 | #endif | 124 | #endif |
142 | } else if (pending & STATUSF_IP3) { | 125 | } else if (pending & STATUSF_IP3) { |
143 | do_IRQ(3, regs); | 126 | do_IRQ(3); |
144 | } else if (pending & STATUSF_IP4) { | 127 | } else if (pending & STATUSF_IP4) { |
145 | do_IRQ(4, regs); | 128 | do_IRQ(4); |
146 | } else if (pending & STATUSF_IP5) { | 129 | } else if (pending & STATUSF_IP5) { |
147 | #ifdef CONFIG_SMP | 130 | #ifdef CONFIG_SMP |
148 | titan_mailbox_irq(regs); | 131 | titan_mailbox_irq(); |
149 | #else | 132 | #else |
150 | do_IRQ(5, regs); | 133 | do_IRQ(5); |
151 | #endif | 134 | #endif |
152 | } else if (pending & STATUSF_IP6) { | 135 | } else if (pending & STATUSF_IP6) { |
153 | do_IRQ(4, regs); | 136 | do_IRQ(4); |
154 | } | 137 | } |
155 | } | 138 | } |
156 | 139 | ||
@@ -178,18 +161,3 @@ void __init arch_init_irq(void) | |||
178 | register_gdb_console(); | 161 | register_gdb_console(); |
179 | #endif | 162 | #endif |
180 | } | 163 | } |
181 | |||
182 | #ifdef CONFIG_KGDB | ||
183 | /* | ||
184 | * The 16550 DUART has two ports, but is allocated one IRQ | ||
185 | * for the serial console. Hence, a generic framework for | ||
186 | * serial IRQ routing in place. Currently, just calls the | ||
187 | * do_IRQ fuction. But, going in the future, need to check | ||
188 | * DUART registers for channel A and B, then decide the | ||
189 | * appropriate action | ||
190 | */ | ||
191 | asmlinkage void yosemite_kgdb_irq(int irq, struct pt_regs *regs) | ||
192 | { | ||
193 | do_IRQ(irq, regs); | ||
194 | } | ||
195 | #endif | ||
diff --git a/arch/mips/pmc-sierra/yosemite/smp.c b/arch/mips/pmc-sierra/yosemite/smp.c index c197311e15d3..65fa3a23ea5e 100644 --- a/arch/mips/pmc-sierra/yosemite/smp.c +++ b/arch/mips/pmc-sierra/yosemite/smp.c | |||
@@ -110,7 +110,7 @@ void prom_smp_finish(void) | |||
110 | { | 110 | { |
111 | } | 111 | } |
112 | 112 | ||
113 | asmlinkage void titan_mailbox_irq(struct pt_regs *regs) | 113 | asmlinkage void titan_mailbox_irq(void) |
114 | { | 114 | { |
115 | int cpu = smp_processor_id(); | 115 | int cpu = smp_processor_id(); |
116 | unsigned long status; | 116 | unsigned long status; |