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authorRalf Baechle <ralf@linux-mips.org>2006-04-03 12:56:36 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-04-18 22:14:21 -0400
commite4ac58afdfac792c0583af30dbd9eae53e24c78b (patch)
tree7517bef2c515fc630e4d3d238867b91cde96f558 /arch/mips/pmc-sierra/yosemite/irq.c
parentd35d473c25d43d7db3e5e18b66d558d2a631cca8 (diff)
[MIPS] Rewrite all the assembler interrupt handlers to C.
Saves like 1,600 lines of code, is way easier to debug, compilers frequently do a better job than the cut and paste type of handlers many boards had. And finally having all the stuff done in a single place also means alot of bug potencial for the MT ASE is gone. The only surviving handler in assembler is the DECstation one; I hope Maciej will rewrite it. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pmc-sierra/yosemite/irq.c')
-rw-r--r--arch/mips/pmc-sierra/yosemite/irq.c33
1 files changed, 31 insertions, 2 deletions
diff --git a/arch/mips/pmc-sierra/yosemite/irq.c b/arch/mips/pmc-sierra/yosemite/irq.c
index f4e2897d9bf7..a1f524fc4c10 100644
--- a/arch/mips/pmc-sierra/yosemite/irq.c
+++ b/arch/mips/pmc-sierra/yosemite/irq.c
@@ -2,6 +2,8 @@
2 * Copyright (C) 2003 PMC-Sierra Inc. 2 * Copyright (C) 2003 PMC-Sierra Inc.
3 * Author: Manish Lachwani (lachwani@pmc-sierra.com) 3 * Author: Manish Lachwani (lachwani@pmc-sierra.com)
4 * 4 *
5 * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org)
6 *
5 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the 8 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your 9 * Free Software Foundation; either version 2 of the License, or (at your
@@ -55,7 +57,6 @@
55#define HYPERTRANSPORT_INTC 0x7a /* INTC# */ 57#define HYPERTRANSPORT_INTC 0x7a /* INTC# */
56#define HYPERTRANSPORT_INTD 0x7b /* INTD# */ 58#define HYPERTRANSPORT_INTD 0x7b /* INTD# */
57 59
58extern asmlinkage void titan_handle_int(void);
59extern void jaguar_mailbox_irq(struct pt_regs *); 60extern void jaguar_mailbox_irq(struct pt_regs *);
60 61
61/* 62/*
@@ -125,6 +126,35 @@ asmlinkage void do_extended_irq(struct pt_regs *regs)
125 126
126} 127}
127 128
129asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
130{
131 unsigned int cause = read_c0_cause();
132 unsigned int status = read_c0_status();
133 unsigned int pending = cause & status;
134
135 if (pending & STATUSF_IP7) {
136 do_IRQ(7, regs);
137 } else if (pending & STATUSF_IP2) {
138#ifdef CONFIG_HYPERTRANSPORT
139 ll_ht_smp_irq_handler(2, regs);
140#else
141 do_IRQ(2, regs);
142#endif
143 } else if (pending & STATUSF_IP3) {
144 do_IRQ(3, regs);
145 } else if (pending & STATUSF_IP4) {
146 do_IRQ(4, regs);
147 } else if (pending & STATUSF_IP5) {
148#ifdef CONFIG_SMP
149 titan_mailbox_irq(regs);
150#else
151 do_IRQ(5, regs);
152#endif
153 } else if (pending & STATUSF_IP6) {
154 do_IRQ(4, regs);
155 }
156}
157
128#ifdef CONFIG_KGDB 158#ifdef CONFIG_KGDB
129extern void init_second_port(void); 159extern void init_second_port(void);
130#endif 160#endif
@@ -136,7 +166,6 @@ void __init arch_init_irq(void)
136{ 166{
137 clear_c0_status(ST0_IM); 167 clear_c0_status(ST0_IM);
138 168
139 set_except_vector(0, titan_handle_int);
140 mips_cpu_irq_init(0); 169 mips_cpu_irq_init(0);
141 rm7k_cpu_irq_init(8); 170 rm7k_cpu_irq_init(8);
142 rm9k_cpu_irq_init(12); 171 rm9k_cpu_irq_init(12);