[MIPS] PNX8550 fixups

This patch fixes the compilation errors on PNX8550 and hard-to-track
bug in interrupt handling.
It also corresponds to the latest changes in PNX8550 serial driver.

Signed-off-by: Vitaly Wool <vitalywool@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 3 insertions, 3 deletions

diff --git a/arch/mips/philips/pnx8550/common/setup.c b/arch/mips/philips/pnx8550/common/setup.c
index 36b0c8bc6c06..e62123ca9b64 100644
--- a/arch/mips/philips/pnx8550/common/setup.c
+++ b/arch/mips/philips/pnx8550/common/setup.c
@@ -24,7 +24,7 @@
 #include <linux/mm.h>
 #include <linux/delay.h>
 #include <linux/interrupt.h>
-#include <linux/serial_ip3106.h>
+#include <linux/serial_pnx8xxx.h>
 #include <linux/pm.h>
 
 #include <asm/cpu.h>
@@ -56,7 +56,7 @@ extern char *prom_getcmdline(void);
 
 struct resource standard_io_resources[] = {
         {
-                .start  = .0x00,
+                .start  = 0x00,
                 .end    = 0x1f,
                 .name   = "dma1",
                 .flags  = IORESOURCE_BUSY
@@ -144,7 +144,7 @@ void __init plat_mem_setup(void)
                 /* We must initialize the UART (console) before prom_printf */
                 /* Set LCR to 8-bit and BAUD to 38400 (no 5)                */
                 ip3106_lcr(UART_BASE, pnx8550_console_port) =
-                        IP3106_UART_LCR_8BIT;
+                        PNX8XXX_UART_LCR_8BIT;
                 ip3106_baud(UART_BASE, pnx8550_console_port) = 5;
         }