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authorLinus Torvalds <torvalds@g5.osdl.org>2006-06-29 16:44:45 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-29 16:44:45 -0400
commit8d231c11fd0b694c447e59e687754b6999eea0a2 (patch)
treeb0b3c17efff7018bbf948e489f642c8079f33cc0 /arch/mips/pci
parent1f1332f727c3229eb2166a83fec5d3de6a73dce2 (diff)
parent8db089c6b5594c961fb6bc6d613b9926e0d3d98f (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (33 commits) [MIPS] Add missing backslashes to macro definitions. [MIPS] Death list of board support to be removed after 2.6.18. [MIPS] Remove BSD and Sys V compat data types. [MIPS] ioc3.h: Uses u8, so include <linux/types.h>. [MIPS] 74K: Assume it will also have an AR bit in config7 [MIPS] Treat CPUs with AR bit as physically indexed. [MIPS] Oprofile: Support VSMP on 34K. [MIPS] MIPS32/MIPS64 S-cache fix and cleanup [MIPS] excite: PCI makefile needs to use += if it wants a chance to work. [MIPS] excite: plat_setup -> plat_mem_setup. [MIPS] au1xxx: export dbdma functions [MIPS] au1xxx: dbdma, no sleeping under spin_lock [MIPS] au1xxx: fix PSC_SMBTXRX_RSR. [MIPS] Early printk for IP27. [MIPS] Fix handling of 0 length I & D caches. [MIPS] Typo fixes. [MIPS] MIPS32/MIPS64 secondary cache management [MIPS] Fix FIXADDR_TOP for TX39/TX49. [MIPS] Remove first timer interrupt setup in wrppmc_timer_setup() [MIPS] Fix configuration of R2 CPU features and multithreading. ...
Diffstat (limited to 'arch/mips/pci')
-rw-r--r--arch/mips/pci/Makefile2
-rw-r--r--arch/mips/pci/ops-tx4927.c8
-rw-r--r--arch/mips/pci/ops-tx4938.c8
3 files changed, 9 insertions, 9 deletions
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index 465778c5d816..35d5927706ea 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -23,7 +23,7 @@ obj-$(CONFIG_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o
23# 23#
24# These are still pretty much in the old state, watch, go blind. 24# These are still pretty much in the old state, watch, go blind.
25# 25#
26obj-$(CONFIG_BASLER_EXCITE) = ops-titan.o pci-excite.o fixup-excite.o 26obj-$(CONFIG_BASLER_EXCITE) += ops-titan.o pci-excite.o fixup-excite.o
27obj-$(CONFIG_DDB5477) += fixup-ddb5477.o pci-ddb5477.o ops-ddb5477.o 27obj-$(CONFIG_DDB5477) += fixup-ddb5477.o pci-ddb5477.o ops-ddb5477.o
28obj-$(CONFIG_LASAT) += pci-lasat.o 28obj-$(CONFIG_LASAT) += pci-lasat.o
29obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o 29obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o
diff --git a/arch/mips/pci/ops-tx4927.c b/arch/mips/pci/ops-tx4927.c
index 7688b7711329..150419c8b414 100644
--- a/arch/mips/pci/ops-tx4927.c
+++ b/arch/mips/pci/ops-tx4927.c
@@ -119,7 +119,7 @@ static int tx4927_pcibios_read_config(struct pci_bus *bus, unsigned int devfn, i
119 119
120 switch (size) { 120 switch (size) {
121 case 1: 121 case 1:
122 *val = *(volatile u8 *) ((ulong) & tx4927_pcicptr-> 122 *val = *(volatile u8 *) ((unsigned long) & tx4927_pcicptr->
123 g2pcfgdata | 123 g2pcfgdata |
124#ifdef __LITTLE_ENDIAN 124#ifdef __LITTLE_ENDIAN
125 (where & 3)); 125 (where & 3));
@@ -128,7 +128,7 @@ static int tx4927_pcibios_read_config(struct pci_bus *bus, unsigned int devfn, i
128#endif 128#endif
129 break; 129 break;
130 case 2: 130 case 2:
131 *val = *(volatile u16 *) ((ulong) & tx4927_pcicptr-> 131 *val = *(volatile u16 *) ((unsigned long) & tx4927_pcicptr->
132 g2pcfgdata | 132 g2pcfgdata |
133#ifdef __LITTLE_ENDIAN 133#ifdef __LITTLE_ENDIAN
134 (where & 3)); 134 (where & 3));
@@ -168,7 +168,7 @@ static int tx4927_pcibios_write_config(struct pci_bus *bus, unsigned int devfn,
168 168
169 switch (size) { 169 switch (size) {
170 case 1: 170 case 1:
171 *(volatile u8 *) ((ulong) & tx4927_pcicptr-> 171 *(volatile u8 *) ((unsigned long) & tx4927_pcicptr->
172 g2pcfgdata | 172 g2pcfgdata |
173#ifdef __LITTLE_ENDIAN 173#ifdef __LITTLE_ENDIAN
174 (where & 3)) = val; 174 (where & 3)) = val;
@@ -178,7 +178,7 @@ static int tx4927_pcibios_write_config(struct pci_bus *bus, unsigned int devfn,
178 break; 178 break;
179 179
180 case 2: 180 case 2:
181 *(volatile u16 *) ((ulong) & tx4927_pcicptr-> 181 *(volatile u16 *) ((unsigned long) & tx4927_pcicptr->
182 g2pcfgdata | 182 g2pcfgdata |
183#ifdef __LITTLE_ENDIAN 183#ifdef __LITTLE_ENDIAN
184 (where & 3)) = val; 184 (where & 3)) = val;
diff --git a/arch/mips/pci/ops-tx4938.c b/arch/mips/pci/ops-tx4938.c
index 0ff083489efd..445007084515 100644
--- a/arch/mips/pci/ops-tx4938.c
+++ b/arch/mips/pci/ops-tx4938.c
@@ -106,7 +106,7 @@ static int tx4938_pcibios_read_config(struct pci_bus *bus, unsigned int devfn,
106 106
107 switch (size) { 107 switch (size) {
108 case 1: 108 case 1:
109 *val = *(volatile u8 *) ((ulong) & tx4938_pcicptr->g2pcfgdata | 109 *val = *(volatile u8 *) ((unsigned long) & tx4938_pcicptr->g2pcfgdata |
110#ifdef __BIG_ENDIAN 110#ifdef __BIG_ENDIAN
111 ((where & 3) ^ 3)); 111 ((where & 3) ^ 3));
112#else 112#else
@@ -114,7 +114,7 @@ static int tx4938_pcibios_read_config(struct pci_bus *bus, unsigned int devfn,
114#endif 114#endif
115 break; 115 break;
116 case 2: 116 case 2:
117 *val = *(volatile u16 *) ((ulong) & tx4938_pcicptr->g2pcfgdata | 117 *val = *(volatile u16 *) ((unsigned long) & tx4938_pcicptr->g2pcfgdata |
118#ifdef __BIG_ENDIAN 118#ifdef __BIG_ENDIAN
119 ((where & 3) ^ 2)); 119 ((where & 3) ^ 2));
120#else 120#else
@@ -154,7 +154,7 @@ static int tx4938_pcibios_write_config(struct pci_bus *bus, unsigned int devfn,
154 154
155 switch (size) { 155 switch (size) {
156 case 1: 156 case 1:
157 *(volatile u8 *) ((ulong) & tx4938_pcicptr->g2pcfgdata | 157 *(volatile u8 *) ((unsigned long) & tx4938_pcicptr->g2pcfgdata |
158#ifdef __BIG_ENDIAN 158#ifdef __BIG_ENDIAN
159 ((where & 3) ^ 3)) = val; 159 ((where & 3) ^ 3)) = val;
160#else 160#else
@@ -162,7 +162,7 @@ static int tx4938_pcibios_write_config(struct pci_bus *bus, unsigned int devfn,
162#endif 162#endif
163 break; 163 break;
164 case 2: 164 case 2:
165 *(volatile u16 *) ((ulong) & tx4938_pcicptr->g2pcfgdata | 165 *(volatile u16 *) ((unsigned long) & tx4938_pcicptr->g2pcfgdata |
166#ifdef __BIG_ENDIAN 166#ifdef __BIG_ENDIAN
167 ((where & 0x3) ^ 0x2)) = val; 167 ((where & 0x3) ^ 0x2)) = val;
168#else 168#else