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authordmitry pervushin <dpervushin@ru.mvista.com>2006-05-21 06:53:06 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-06-19 12:39:26 -0400
commit355c471f2ff324c21f8a1fb8e2e242a0f2a4aa68 (patch)
tree8a491d03e865b9e16686004dea765a141e048219 /arch/mips/pci
parent4a0312fca6599299bbed944ce09278d90388a3e5 (diff)
[MIPS] Support for the R5500-based NEC EMMA2RH Mark-eins board
Signed-off-by: dmitry pervushin <dpervushin@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci')
-rw-r--r--arch/mips/pci/Makefile1
-rw-r--r--arch/mips/pci/fixup-emma2rh.c102
-rw-r--r--arch/mips/pci/ops-emma2rh.c186
-rw-r--r--arch/mips/pci/pci-emma2rh.c90
4 files changed, 379 insertions, 0 deletions
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index c5f5516f4695..56000a069604 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o
18obj-$(CONFIG_MIPS_TX3927) += ops-tx3927.o 18obj-$(CONFIG_MIPS_TX3927) += ops-tx3927.o
19obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o 19obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o
20obj-$(CONFIG_NEC_CMBVR4133) += fixup-vr4133.o 20obj-$(CONFIG_NEC_CMBVR4133) += fixup-vr4133.o
21obj-$(CONFIG_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o
21 22
22# 23#
23# These are still pretty much in the old state, watch, go blind. 24# These are still pretty much in the old state, watch, go blind.
diff --git a/arch/mips/pci/fixup-emma2rh.c b/arch/mips/pci/fixup-emma2rh.c
new file mode 100644
index 000000000000..3a34cd0efd6b
--- /dev/null
+++ b/arch/mips/pci/fixup-emma2rh.c
@@ -0,0 +1,102 @@
1/*
2 * arch/mips/pci/fixup-emma2rh.c
3 * This file defines the PCI configration.
4 *
5 * Copyright (C) NEC Electronics Corporation 2004-2006
6 *
7 * This file is based on the arch/mips/ddb5xxx/ddb5477/pci.c
8 *
9 * Copyright 2001 MontaVista Software Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 */
25
26#include <linux/config.h>
27#include <linux/kernel.h>
28#include <linux/init.h>
29#include <linux/types.h>
30#include <linux/pci.h>
31
32#include <asm/bootinfo.h>
33#include <asm/debug.h>
34
35#include <asm/emma2rh/emma2rh.h>
36
37#define EMMA2RH_PCI_HOST_SLOT 0x09
38#define EMMA2RH_USB_SLOT 0x03
39#define PCI_DEVICE_ID_NEC_EMMA2RH 0x014b /* EMMA2RH PCI Host */
40
41/*
42 * we fix up irqs based on the slot number.
43 * The first entry is at AD:11.
44 * Fortunately this works because, although we have two pci buses,
45 * they all have different slot numbers (except for rockhopper slot 20
46 * which is handled below).
47 *
48 */
49
50#define MAX_SLOT_NUM 10
51static unsigned char irq_map[][5] __initdata = {
52 [3] = {0, MARKEINS_PCI_IRQ_INTB, MARKEINS_PCI_IRQ_INTC,
53 MARKEINS_PCI_IRQ_INTD, 0,},
54 [4] = {0, MARKEINS_PCI_IRQ_INTA, 0, 0, 0,},
55 [5] = {0, 0, 0, 0, 0,},
56 [6] = {0, MARKEINS_PCI_IRQ_INTC, MARKEINS_PCI_IRQ_INTD,
57 MARKEINS_PCI_IRQ_INTA, MARKEINS_PCI_IRQ_INTB,},
58};
59
60static void __devinit nec_usb_controller_fixup(struct pci_dev *dev)
61{
62 if (PCI_SLOT(dev->devfn) == EMMA2RH_USB_SLOT)
63 /* on board USB controller configuration */
64 pci_write_config_dword(dev, 0xe4, 1 << 5);
65}
66
67DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
68 nec_usb_controller_fixup);
69
70/*
71 * Prevent the PCI layer from seeing the resources allocated to this device
72 * if it is the host bridge by marking it as such. These resources are of
73 * no consequence to the PCI layer (they are handled elsewhere).
74 */
75static void __devinit emma2rh_pci_host_fixup(struct pci_dev *dev)
76{
77 int i;
78
79 if (PCI_SLOT(dev->devfn) == EMMA2RH_PCI_HOST_SLOT) {
80 dev->class &= 0xff;
81 dev->class |= PCI_CLASS_BRIDGE_HOST << 8;
82 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
83 dev->resource[i].start = 0;
84 dev->resource[i].end = 0;
85 dev->resource[i].flags = 0;
86 }
87 }
88}
89
90DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_EMMA2RH,
91 emma2rh_pci_host_fixup);
92
93int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
94{
95 return irq_map[slot][pin];
96}
97
98/* Do platform specific device initialization at pci_enable_device() time */
99int pcibios_plat_dev_init(struct pci_dev *dev)
100{
101 return 0;
102}
diff --git a/arch/mips/pci/ops-emma2rh.c b/arch/mips/pci/ops-emma2rh.c
new file mode 100644
index 000000000000..e21b11bf66bc
--- /dev/null
+++ b/arch/mips/pci/ops-emma2rh.c
@@ -0,0 +1,186 @@
1/*
2 * arch/mips/pci/ops-emma2rh.c
3 * This file defines the PCI operation for EMMA2RH.
4 *
5 * Copyright (C) NEC Electronics Corporation 2004-2006
6 *
7 * This file is based on the arch/mips/pci/ops-vr41xx.c
8 *
9 * Copyright 2001 MontaVista Software Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 */
25
26#include <linux/config.h>
27#include <linux/pci.h>
28#include <linux/kernel.h>
29#include <linux/types.h>
30
31#include <asm/addrspace.h>
32#include <asm/debug.h>
33
34#include <asm/emma2rh/emma2rh.h>
35
36#define RTABORT (0x1<<9)
37#define RMABORT (0x1<<10)
38#define EMMA2RH_PCI_SLOT_NUM 9 /* 0000:09.0 is final PCI device */
39
40/*
41 * access config space
42 */
43
44static int check_args(struct pci_bus *bus, u32 devfn, u32 * bus_num)
45{
46 /* check if the bus is top-level */
47 if (bus->parent != NULL) {
48 *bus_num = bus->number;
49 db_assert(bus_num != 0);
50 } else
51 *bus_num = 0;
52
53 if (*bus_num == 0) {
54 /* Type 0 */
55 if (PCI_SLOT(devfn) >= 10)
56 return PCIBIOS_DEVICE_NOT_FOUND;
57 } else {
58 /* Type 1 */
59 if ((*bus_num >= 64) || (PCI_SLOT(devfn) >= 16))
60 return PCIBIOS_DEVICE_NOT_FOUND;
61 }
62 return 0;
63}
64
65static inline int set_pci_configuration_address(unsigned char bus_num,
66 unsigned int devfn, int where)
67{
68 u32 config_win0;
69
70 emma2rh_out32(EMMA2RH_PCI_INT, ~RMABORT);
71 if (bus_num == 0)
72 /*
73 * Type 0 configuration
74 */
75 config_win0 = (1 << (22 + PCI_SLOT(devfn))) | (5 << 9);
76 else
77 /*
78 * Type 1 configuration
79 */
80 config_win0 = (bus_num << 26) | (PCI_SLOT(devfn) << 22) |
81 (1 << 15) | (5 << 9);
82
83 emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, config_win0);
84
85 return 0;
86}
87
88static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where,
89 int size, uint32_t * val)
90{
91 u32 bus_num;
92 u32 base = KSEG1ADDR(EMMA2RH_PCI_CONFIG_BASE);
93 u32 backup_win0;
94 u32 data;
95
96 *val = 0xffffffffU;
97
98 if (check_args(bus, devfn, &bus_num) == PCIBIOS_DEVICE_NOT_FOUND)
99 return PCIBIOS_DEVICE_NOT_FOUND;
100
101 backup_win0 = emma2rh_in32(EMMA2RH_PCI_IWIN0_CTR);
102
103 if (set_pci_configuration_address(bus_num, devfn, where) < 0)
104 return PCIBIOS_DEVICE_NOT_FOUND;
105
106 data =
107 *(volatile u32 *)(base + (PCI_FUNC(devfn) << 8) +
108 (where & 0xfffffffc));
109
110 switch (size) {
111 case 1:
112 *val = (data >> ((where & 3) << 3)) & 0xffU;
113 break;
114 case 2:
115 *val = (data >> ((where & 2) << 3)) & 0xffffU;
116 break;
117 case 4:
118 *val = data;
119 break;
120 default:
121 emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, backup_win0);
122 return PCIBIOS_FUNC_NOT_SUPPORTED;
123 }
124
125 emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, backup_win0);
126
127 if (emma2rh_in32(EMMA2RH_PCI_INT) & RMABORT)
128 return PCIBIOS_DEVICE_NOT_FOUND;
129
130 return PCIBIOS_SUCCESSFUL;
131}
132
133static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where,
134 int size, u32 val)
135{
136 u32 bus_num;
137 u32 base = KSEG1ADDR(EMMA2RH_PCI_CONFIG_BASE);
138 u32 backup_win0;
139 u32 data;
140 int shift;
141
142 if (check_args(bus, devfn, &bus_num) == PCIBIOS_DEVICE_NOT_FOUND)
143 return PCIBIOS_DEVICE_NOT_FOUND;
144
145 backup_win0 = emma2rh_in32(EMMA2RH_PCI_IWIN0_CTR);
146
147 if (set_pci_configuration_address(bus_num, devfn, where) < 0)
148 return PCIBIOS_DEVICE_NOT_FOUND;
149
150 /* read modify write */
151 data =
152 *(volatile u32 *)(base + (PCI_FUNC(devfn) << 8) +
153 (where & 0xfffffffc));
154
155 switch (size) {
156 case 1:
157 shift = (where & 3) << 3;
158 data &= ~(0xffU << shift);
159 data |= ((val & 0xffU) << shift);
160 break;
161 case 2:
162 shift = (where & 2) << 3;
163 data &= ~(0xffffU << shift);
164 data |= ((val & 0xffffU) << shift);
165 break;
166 case 4:
167 data = val;
168 break;
169 default:
170 emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, backup_win0);
171 return PCIBIOS_FUNC_NOT_SUPPORTED;
172 }
173 *(volatile u32 *)(base + (PCI_FUNC(devfn) << 8) +
174 (where & 0xfffffffc)) = data;
175
176 emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, backup_win0);
177 if (emma2rh_in32(EMMA2RH_PCI_INT) & RMABORT)
178 return PCIBIOS_DEVICE_NOT_FOUND;
179
180 return PCIBIOS_SUCCESSFUL;
181}
182
183struct pci_ops emma2rh_pci_ops = {
184 .read = pci_config_read,
185 .write = pci_config_write,
186};
diff --git a/arch/mips/pci/pci-emma2rh.c b/arch/mips/pci/pci-emma2rh.c
new file mode 100644
index 000000000000..0f8b230057d3
--- /dev/null
+++ b/arch/mips/pci/pci-emma2rh.c
@@ -0,0 +1,90 @@
1/*
2 * arch/mips/pci/pci-emma2rh.c
3 * This file defines the PCI configration.
4 *
5 * Copyright (C) NEC Electronics Corporation 2004-2006
6 *
7 * This file is based on the arch/mips/ddb5xxx/ddb5477/pci.c
8 *
9 * Copyright 2001 MontaVista Software Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 */
25
26#include <linux/config.h>
27#include <linux/kernel.h>
28#include <linux/init.h>
29#include <linux/types.h>
30#include <linux/pci.h>
31
32#include <asm/bootinfo.h>
33#include <asm/debug.h>
34
35#include <asm/emma2rh/emma2rh.h>
36
37static struct resource pci_io_resource = {
38 .name = "pci IO space",
39 .start = EMMA2RH_PCI_IO_BASE,
40 .end = EMMA2RH_PCI_IO_BASE + EMMA2RH_PCI_IO_SIZE - 1,
41 .flags = IORESOURCE_IO,
42};
43
44static struct resource pci_mem_resource = {
45 .name = "pci memory space",
46 .start = EMMA2RH_PCI_MEM_BASE,
47 .end = EMMA2RH_PCI_MEM_BASE + EMMA2RH_PCI_MEM_SIZE - 1,
48 .flags = IORESOURCE_MEM,
49};
50
51extern struct pci_ops emma2rh_pci_ops;
52
53static struct pci_controller emma2rh_pci_controller = {
54 .pci_ops = &emma2rh_pci_ops,
55 .mem_resource = &pci_mem_resource,
56 .io_resource = &pci_io_resource,
57 .mem_offset = -0x04000000,
58 .io_offset = 0,
59};
60
61static void __init emma2rh_pci_init(void)
62{
63 /* setup PCI interface */
64 emma2rh_out32(EMMA2RH_PCI_ARBIT_CTR, 0x70f);
65
66 emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, 0x80000a18);
67 emma2rh_out32(EMMA2RH_PCI_CONFIG_BASE + PCI_COMMAND,
68 PCI_STATUS_DEVSEL_MEDIUM | PCI_STATUS_CAP_LIST |
69 PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
70 emma2rh_out32(EMMA2RH_PCI_CONFIG_BASE + PCI_BASE_ADDRESS_0, 0x10000000);
71 emma2rh_out32(EMMA2RH_PCI_CONFIG_BASE + PCI_BASE_ADDRESS_1, 0x00000000);
72
73 emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, 0x12000000 | 0x218);
74 emma2rh_out32(EMMA2RH_PCI_IWIN1_CTR, 0x18000000 | 0x600);
75 emma2rh_out32(EMMA2RH_PCI_INIT_ESWP, 0x00000200);
76
77 emma2rh_out32(EMMA2RH_PCI_TWIN_CTR, 0x00009200);
78 emma2rh_out32(EMMA2RH_PCI_TWIN_BADR, 0x00000000);
79 emma2rh_out32(EMMA2RH_PCI_TWIN0_DADR, 0x00000000);
80 emma2rh_out32(EMMA2RH_PCI_TWIN1_DADR, 0x00000000);
81}
82
83static int __init emma2rh_pci_setup(void)
84{
85 emma2rh_pci_init();
86 register_pci_controller(&emma2rh_pci_controller);
87 return 0;
88}
89
90arch_initcall(emma2rh_pci_setup);