diff options
author | Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 2007-05-11 08:43:09 -0400 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2007-05-11 09:28:34 -0400 |
commit | 3f2d560e9029ec0b7edf8be0c32425f4bb57d582 (patch) | |
tree | c1eec72f06c535cd18e2e53efd01e3403572056b /arch/mips/pci | |
parent | b0cc114c04c114b933661eba329d9776c0eab74c (diff) |
[MIPS] Rework cobalt_board_id
This patch has reworked cobalt_board_id.
The cobalt_board_id is read from PCI config register.
It should be in PCI routine.
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci')
-rw-r--r-- | arch/mips/pci/fixup-cobalt.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/mips/pci/fixup-cobalt.c b/arch/mips/pci/fixup-cobalt.c index f4acae694a5a..d57ffd7242ca 100644 --- a/arch/mips/pci/fixup-cobalt.c +++ b/arch/mips/pci/fixup-cobalt.c | |||
@@ -113,6 +113,27 @@ static void qube_raq_galileo_fixup(struct pci_dev *dev) | |||
113 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_GT64111, | 113 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_GT64111, |
114 | qube_raq_galileo_fixup); | 114 | qube_raq_galileo_fixup); |
115 | 115 | ||
116 | int cobalt_board_id; | ||
117 | |||
118 | static void qube_raq_via_board_id_fixup(struct pci_dev *dev) | ||
119 | { | ||
120 | u8 id; | ||
121 | int retval; | ||
122 | |||
123 | retval = pci_read_config_byte(dev, VIA_COBALT_BRD_ID_REG, &id); | ||
124 | if (retval) { | ||
125 | panic("Cannot read board ID"); | ||
126 | return; | ||
127 | } | ||
128 | |||
129 | cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(id); | ||
130 | |||
131 | printk(KERN_INFO "Cobalt board ID: %d\n", cobalt_board_id); | ||
132 | } | ||
133 | |||
134 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_0, | ||
135 | qube_raq_via_board_id_fixup); | ||
136 | |||
116 | static char irq_tab_qube1[] __initdata = { | 137 | static char irq_tab_qube1[] __initdata = { |
117 | [COBALT_PCICONF_CPU] = 0, | 138 | [COBALT_PCICONF_CPU] = 0, |
118 | [COBALT_PCICONF_ETH0] = COBALT_QUBE1_ETH0_IRQ, | 139 | [COBALT_PCICONF_ETH0] = COBALT_QUBE1_ETH0_IRQ, |