diff options
author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2007-03-14 11:58:28 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2007-04-27 11:20:23 -0400 |
commit | 2127435e57a15f1fea8d6969e264eeb05b28ba4b (patch) | |
tree | c8ae7407efcfe42309fbab978c931e17042780b8 /arch/mips/pci | |
parent | 252161eccd1a44f32a506d0fedb424d4ff84e4dc (diff) |
[MIPS] JMR3927 cleanup
* Kill dead codes
* Rearrange irq chip handlers
* Minimize defconfig
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci')
-rw-r--r-- | arch/mips/pci/fixup-jmr3927.c | 11 | ||||
-rw-r--r-- | arch/mips/pci/ops-tx3927.c | 232 |
2 files changed, 2 insertions, 241 deletions
diff --git a/arch/mips/pci/fixup-jmr3927.c b/arch/mips/pci/fixup-jmr3927.c index 6e72d213f4cd..73d18503517c 100644 --- a/arch/mips/pci/fixup-jmr3927.c +++ b/arch/mips/pci/fixup-jmr3927.c | |||
@@ -29,7 +29,6 @@ | |||
29 | */ | 29 | */ |
30 | #include <linux/types.h> | 30 | #include <linux/types.h> |
31 | #include <linux/pci.h> | 31 | #include <linux/pci.h> |
32 | #include <linux/kernel.h> | ||
33 | #include <linux/init.h> | 32 | #include <linux/init.h> |
34 | 33 | ||
35 | #include <asm/jmr3927/jmr3927.h> | 34 | #include <asm/jmr3927/jmr3927.h> |
@@ -81,14 +80,8 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | |||
81 | 80 | ||
82 | /* Check OnBoard Ethernet (IDSEL=A24, DevNu=13) */ | 81 | /* Check OnBoard Ethernet (IDSEL=A24, DevNu=13) */ |
83 | if (dev->bus->parent == NULL && | 82 | if (dev->bus->parent == NULL && |
84 | slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(24)) { | 83 | slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(24)) |
85 | extern int jmr3927_ether1_irq; | 84 | irq = JMR3927_IRQ_ETHER0; |
86 | /* check this irq line was reserved for ether1 */ | ||
87 | if (jmr3927_ether1_irq != JMR3927_IRQ_ETHER0) | ||
88 | irq = JMR3927_IRQ_ETHER0; | ||
89 | else | ||
90 | irq = 0; /* disable */ | ||
91 | } | ||
92 | return irq; | 85 | return irq; |
93 | } | 86 | } |
94 | 87 | ||
diff --git a/arch/mips/pci/ops-tx3927.c b/arch/mips/pci/ops-tx3927.c index 42530a0b84b3..aa698bd0d5e3 100644 --- a/arch/mips/pci/ops-tx3927.c +++ b/arch/mips/pci/ops-tx3927.c | |||
@@ -40,7 +40,6 @@ | |||
40 | 40 | ||
41 | #include <asm/addrspace.h> | 41 | #include <asm/addrspace.h> |
42 | #include <asm/jmr3927/jmr3927.h> | 42 | #include <asm/jmr3927/jmr3927.h> |
43 | #include <asm/debug.h> | ||
44 | 43 | ||
45 | static inline int mkaddr(unsigned char bus, unsigned char dev_fn, | 44 | static inline int mkaddr(unsigned char bus, unsigned char dev_fn, |
46 | unsigned char where) | 45 | unsigned char where) |
@@ -130,234 +129,3 @@ struct pci_ops jmr3927_pci_ops = { | |||
130 | jmr3927_pci_read_config, | 129 | jmr3927_pci_read_config, |
131 | jmr3927_pci_write_config, | 130 | jmr3927_pci_write_config, |
132 | }; | 131 | }; |
133 | |||
134 | |||
135 | #ifndef JMR3927_INIT_INDIRECT_PCI | ||
136 | |||
137 | inline unsigned long tc_readl(volatile __u32 * addr) | ||
138 | { | ||
139 | return readl(addr); | ||
140 | } | ||
141 | |||
142 | inline void tc_writel(unsigned long data, volatile __u32 * addr) | ||
143 | { | ||
144 | writel(data, addr); | ||
145 | } | ||
146 | #else | ||
147 | |||
148 | unsigned long tc_readl(volatile __u32 * addr) | ||
149 | { | ||
150 | unsigned long val; | ||
151 | |||
152 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr = | ||
153 | (unsigned long) CPHYSADDR(addr); | ||
154 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe = | ||
155 | (PCI_IPCIBE_ICMD_MEMREAD << PCI_IPCIBE_ICMD_SHIFT) | | ||
156 | PCI_IPCIBE_IBE_LONG; | ||
157 | while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC)); | ||
158 | val = | ||
159 | le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr-> | ||
160 | ipcidata); | ||
161 | /* clear by setting */ | ||
162 | tx3927_pcicptr->istat |= PCI_ISTAT_IDICC; | ||
163 | return val; | ||
164 | } | ||
165 | |||
166 | void tc_writel(unsigned long data, volatile __u32 * addr) | ||
167 | { | ||
168 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata = | ||
169 | cpu_to_le32(data); | ||
170 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr = | ||
171 | (unsigned long) CPHYSADDR(addr); | ||
172 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe = | ||
173 | (PCI_IPCIBE_ICMD_MEMWRITE << PCI_IPCIBE_ICMD_SHIFT) | | ||
174 | PCI_IPCIBE_IBE_LONG; | ||
175 | while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC)); | ||
176 | /* clear by setting */ | ||
177 | tx3927_pcicptr->istat |= PCI_ISTAT_IDICC; | ||
178 | } | ||
179 | |||
180 | unsigned char tx_ioinb(unsigned char *addr) | ||
181 | { | ||
182 | unsigned long val; | ||
183 | __u32 ioaddr; | ||
184 | int offset; | ||
185 | int byte; | ||
186 | |||
187 | ioaddr = (unsigned long) addr; | ||
188 | offset = ioaddr & 0x3; | ||
189 | byte = 0xf & ~(8 >> offset); | ||
190 | |||
191 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr = | ||
192 | (unsigned long) ioaddr; | ||
193 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe = | ||
194 | (PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) | byte; | ||
195 | while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC)); | ||
196 | val = | ||
197 | le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr-> | ||
198 | ipcidata); | ||
199 | val = val & 0xff; | ||
200 | /* clear by setting */ | ||
201 | tx3927_pcicptr->istat |= PCI_ISTAT_IDICC; | ||
202 | return val; | ||
203 | } | ||
204 | |||
205 | void tx_iooutb(unsigned long data, unsigned char *addr) | ||
206 | { | ||
207 | __u32 ioaddr; | ||
208 | int offset; | ||
209 | int byte; | ||
210 | |||
211 | data = data | (data << 8) | (data << 16) | (data << 24); | ||
212 | ioaddr = (unsigned long) addr; | ||
213 | offset = ioaddr & 0x3; | ||
214 | byte = 0xf & ~(8 >> offset); | ||
215 | |||
216 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata = data; | ||
217 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr = | ||
218 | (unsigned long) ioaddr; | ||
219 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe = | ||
220 | (PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) | byte; | ||
221 | while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC)); | ||
222 | /* clear by setting */ | ||
223 | tx3927_pcicptr->istat |= PCI_ISTAT_IDICC; | ||
224 | } | ||
225 | |||
226 | unsigned short tx_ioinw(unsigned short *addr) | ||
227 | { | ||
228 | unsigned long val; | ||
229 | __u32 ioaddr; | ||
230 | int offset; | ||
231 | int byte; | ||
232 | |||
233 | ioaddr = (unsigned long) addr; | ||
234 | offset = ioaddr & 0x2; | ||
235 | byte = 3 << offset; | ||
236 | |||
237 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr = | ||
238 | (unsigned long) ioaddr; | ||
239 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe = | ||
240 | (PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) | byte; | ||
241 | while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC)); | ||
242 | val = | ||
243 | le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr-> | ||
244 | ipcidata); | ||
245 | val = val & 0xffff; | ||
246 | /* clear by setting */ | ||
247 | tx3927_pcicptr->istat |= PCI_ISTAT_IDICC; | ||
248 | return val; | ||
249 | |||
250 | } | ||
251 | |||
252 | void tx_iooutw(unsigned long data, unsigned short *addr) | ||
253 | { | ||
254 | __u32 ioaddr; | ||
255 | int offset; | ||
256 | int byte; | ||
257 | |||
258 | data = data | (data << 16); | ||
259 | ioaddr = (unsigned long) addr; | ||
260 | offset = ioaddr & 0x2; | ||
261 | byte = 3 << offset; | ||
262 | |||
263 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata = data; | ||
264 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr = | ||
265 | (unsigned long) ioaddr; | ||
266 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe = | ||
267 | (PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) | byte; | ||
268 | while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC)); | ||
269 | /* clear by setting */ | ||
270 | tx3927_pcicptr->istat |= PCI_ISTAT_IDICC; | ||
271 | } | ||
272 | |||
273 | unsigned long tx_ioinl(unsigned int *addr) | ||
274 | { | ||
275 | unsigned long val; | ||
276 | __u32 ioaddr; | ||
277 | |||
278 | ioaddr = (unsigned long) addr; | ||
279 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr = | ||
280 | (unsigned long) ioaddr; | ||
281 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe = | ||
282 | (PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) | | ||
283 | PCI_IPCIBE_IBE_LONG; | ||
284 | while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC)); | ||
285 | val = | ||
286 | le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr-> | ||
287 | ipcidata); | ||
288 | /* clear by setting */ | ||
289 | tx3927_pcicptr->istat |= PCI_ISTAT_IDICC; | ||
290 | return val; | ||
291 | } | ||
292 | |||
293 | void tx_iooutl(unsigned long data, unsigned int *addr) | ||
294 | { | ||
295 | __u32 ioaddr; | ||
296 | |||
297 | ioaddr = (unsigned long) addr; | ||
298 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata = | ||
299 | cpu_to_le32(data); | ||
300 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr = | ||
301 | (unsigned long) ioaddr; | ||
302 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe = | ||
303 | (PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) | | ||
304 | PCI_IPCIBE_IBE_LONG; | ||
305 | while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC)); | ||
306 | /* clear by setting */ | ||
307 | tx3927_pcicptr->istat |= PCI_ISTAT_IDICC; | ||
308 | } | ||
309 | |||
310 | void tx_insbyte(unsigned char *addr, void *buffer, unsigned int count) | ||
311 | { | ||
312 | unsigned char *ptr = (unsigned char *) buffer; | ||
313 | |||
314 | while (count--) { | ||
315 | *ptr++ = tx_ioinb(addr); | ||
316 | } | ||
317 | } | ||
318 | |||
319 | void tx_insword(unsigned short *addr, void *buffer, unsigned int count) | ||
320 | { | ||
321 | unsigned short *ptr = (unsigned short *) buffer; | ||
322 | |||
323 | while (count--) { | ||
324 | *ptr++ = tx_ioinw(addr); | ||
325 | } | ||
326 | } | ||
327 | |||
328 | void tx_inslong(unsigned int *addr, void *buffer, unsigned int count) | ||
329 | { | ||
330 | unsigned long *ptr = (unsigned long *) buffer; | ||
331 | |||
332 | while (count--) { | ||
333 | *ptr++ = tx_ioinl(addr); | ||
334 | } | ||
335 | } | ||
336 | |||
337 | void tx_outsbyte(unsigned char *addr, void *buffer, unsigned int count) | ||
338 | { | ||
339 | unsigned char *ptr = (unsigned char *) buffer; | ||
340 | |||
341 | while (count--) { | ||
342 | tx_iooutb(*ptr++, addr); | ||
343 | } | ||
344 | } | ||
345 | |||
346 | void tx_outsword(unsigned short *addr, void *buffer, unsigned int count) | ||
347 | { | ||
348 | unsigned short *ptr = (unsigned short *) buffer; | ||
349 | |||
350 | while (count--) { | ||
351 | tx_iooutw(*ptr++, addr); | ||
352 | } | ||
353 | } | ||
354 | |||
355 | void tx_outslong(unsigned int *addr, void *buffer, unsigned int count) | ||
356 | { | ||
357 | unsigned long *ptr = (unsigned long *) buffer; | ||
358 | |||
359 | while (count--) { | ||
360 | tx_iooutl(*ptr++, addr); | ||
361 | } | ||
362 | } | ||
363 | #endif | ||