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authorIngo Molnar <mingo@elte.hu>2009-08-11 08:19:09 -0400
committerIngo Molnar <mingo@elte.hu>2009-08-11 08:19:09 -0400
commit89034bc2c7b839702c00a704e79d112737f98be0 (patch)
treee65b1f3d4c751baa840efc81bc4734f089379eb3 /arch/mips/pci/pcie-octeon.c
parentfb82ad719831db58e9baa4c67015aae3fe27e7e3 (diff)
parent85dfd81dc57e8183a277ddd7a56aa65c96f3f487 (diff)
Merge branch 'linus' into tracing/core
Conflicts: kernel/trace/trace_events_filter.c We use the tracing/core version. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/mips/pci/pcie-octeon.c')
-rw-r--r--arch/mips/pci/pcie-octeon.c31
1 files changed, 17 insertions, 14 deletions
diff --git a/arch/mips/pci/pcie-octeon.c b/arch/mips/pci/pcie-octeon.c
index 75262247f3e4..6aa5c542d52d 100644
--- a/arch/mips/pci/pcie-octeon.c
+++ b/arch/mips/pci/pcie-octeon.c
@@ -1040,19 +1040,29 @@ static inline int octeon_pcie_read_config(int pcie_port, struct pci_bus *bus,
1040 int bus_number = bus->number; 1040 int bus_number = bus->number;
1041 1041
1042 /* 1042 /*
1043 * We need to force the bus number to be zero on the root 1043 * For the top level bus make sure our hardware bus number
1044 * bus. Linux numbers the 2nd root bus to start after all 1044 * matches the software one.
1045 * buses on root 0.
1046 */ 1045 */
1047 if (bus->parent == NULL) 1046 if (bus->parent == NULL) {
1048 bus_number = 0; 1047 union cvmx_pciercx_cfg006 pciercx_cfg006;
1048 pciercx_cfg006.u32 = cvmx_pcie_cfgx_read(pcie_port,
1049 CVMX_PCIERCX_CFG006(pcie_port));
1050 if (pciercx_cfg006.s.pbnum != bus_number) {
1051 pciercx_cfg006.s.pbnum = bus_number;
1052 pciercx_cfg006.s.sbnum = bus_number;
1053 pciercx_cfg006.s.subbnum = bus_number;
1054 cvmx_pcie_cfgx_write(pcie_port,
1055 CVMX_PCIERCX_CFG006(pcie_port),
1056 pciercx_cfg006.u32);
1057 }
1058 }
1049 1059
1050 /* 1060 /*
1051 * PCIe only has a single device connected to Octeon. It is 1061 * PCIe only has a single device connected to Octeon. It is
1052 * always device ID 0. Don't bother doing reads for other 1062 * always device ID 0. Don't bother doing reads for other
1053 * device IDs on the first segment. 1063 * device IDs on the first segment.
1054 */ 1064 */
1055 if ((bus_number == 0) && (devfn >> 3 != 0)) 1065 if ((bus->parent == NULL) && (devfn >> 3 != 0))
1056 return PCIBIOS_FUNC_NOT_SUPPORTED; 1066 return PCIBIOS_FUNC_NOT_SUPPORTED;
1057 1067
1058 /* 1068 /*
@@ -1070,7 +1080,7 @@ static inline int octeon_pcie_read_config(int pcie_port, struct pci_bus *bus,
1070 * bridge only respondes to device ID 0, function 1080 * bridge only respondes to device ID 0, function
1071 * 0-1 1081 * 0-1
1072 */ 1082 */
1073 if ((bus_number == 0) && (devfn >= 2)) 1083 if ((bus->parent == NULL) && (devfn >= 2))
1074 return PCIBIOS_FUNC_NOT_SUPPORTED; 1084 return PCIBIOS_FUNC_NOT_SUPPORTED;
1075 /* 1085 /*
1076 * The PCI-X slots are device ID 2,3. Choose one of 1086 * The PCI-X slots are device ID 2,3. Choose one of
@@ -1167,13 +1177,6 @@ static inline int octeon_pcie_write_config(int pcie_port, struct pci_bus *bus,
1167 int size, u32 val) 1177 int size, u32 val)
1168{ 1178{
1169 int bus_number = bus->number; 1179 int bus_number = bus->number;
1170 /*
1171 * We need to force the bus number to be zero on the root
1172 * bus. Linux numbers the 2nd root bus to start after all
1173 * busses on root 0.
1174 */
1175 if (bus->parent == NULL)
1176 bus_number = 0;
1177 1180
1178 switch (size) { 1181 switch (size) {
1179 case 4: 1182 case 4: