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author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-11 21:50:26 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-11 21:50:26 -0500 |
commit | 7b67e751479d50b7f84d1a3cc5216eed5e534b66 (patch) | |
tree | a1a6746857cf65f04dde739fe271bf4143d55eaf /arch/mips/pci/pci.c | |
parent | 9f13a1fd452f11c18004ba2422a6384b424ec8a9 (diff) | |
parent | 76ccc297018d25d55b789bbd508861ef1e2cdb0c (diff) |
Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci
* 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci: (80 commits)
x86/PCI: Expand the x86_msi_ops to have a restore MSIs.
PCI: Increase resource array mask bit size in pcim_iomap_regions()
PCI: DEVICE_COUNT_RESOURCE should be equal to PCI_NUM_RESOURCES
PCI: pci_ids: add device ids for STA2X11 device (aka ConneXT)
PNP: work around Dell 1536/1546 BIOS MMCONFIG bug that breaks USB
x86/PCI: amd: factor out MMCONFIG discovery
PCI: Enable ATS at the device state restore
PCI: msi: fix imbalanced refcount of msi irq sysfs objects
PCI: kconfig: English typo in pci/pcie/Kconfig
PCI/PM/Runtime: make PCI traces quieter
PCI: remove pci_create_bus()
xtensa/PCI: convert to pci_scan_root_bus() for correct root bus resources
x86/PCI: convert to pci_create_root_bus() and pci_scan_root_bus()
x86/PCI: use pci_scan_bus() instead of pci_scan_bus_parented()
x86/PCI: read Broadcom CNB20LE host bridge info before PCI scan
sparc32, leon/PCI: convert to pci_scan_root_bus() for correct root bus resources
sparc/PCI: convert to pci_create_root_bus()
sh/PCI: convert to pci_scan_root_bus() for correct root bus resources
powerpc/PCI: convert to pci_create_root_bus()
powerpc/PCI: split PHB part out of pcibios_map_io_space()
...
Fix up conflicts in drivers/pci/msi.c and include/linux/pci_regs.h due
to the same patches being applied in other branches.
Diffstat (limited to 'arch/mips/pci/pci.c')
-rw-r--r-- | arch/mips/pci/pci.c | 38 |
1 files changed, 10 insertions, 28 deletions
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c index 41af7fa2887b..fa8e378413b1 100644 --- a/arch/mips/pci/pci.c +++ b/arch/mips/pci/pci.c | |||
@@ -81,6 +81,7 @@ static void __devinit pcibios_scanbus(struct pci_controller *hose) | |||
81 | { | 81 | { |
82 | static int next_busno; | 82 | static int next_busno; |
83 | static int need_domain_info; | 83 | static int need_domain_info; |
84 | LIST_HEAD(resources); | ||
84 | struct pci_bus *bus; | 85 | struct pci_bus *bus; |
85 | 86 | ||
86 | if (!hose->iommu) | 87 | if (!hose->iommu) |
@@ -89,7 +90,13 @@ static void __devinit pcibios_scanbus(struct pci_controller *hose) | |||
89 | if (hose->get_busno && pci_probe_only) | 90 | if (hose->get_busno && pci_probe_only) |
90 | next_busno = (*hose->get_busno)(); | 91 | next_busno = (*hose->get_busno)(); |
91 | 92 | ||
92 | bus = pci_scan_bus(next_busno, hose->pci_ops, hose); | 93 | pci_add_resource(&resources, hose->mem_resource); |
94 | pci_add_resource(&resources, hose->io_resource); | ||
95 | bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose, | ||
96 | &resources); | ||
97 | if (!bus) | ||
98 | pci_free_resource_list(&resources); | ||
99 | |||
93 | hose->bus = bus; | 100 | hose->bus = bus; |
94 | 101 | ||
95 | need_domain_info = need_domain_info || hose->index; | 102 | need_domain_info = need_domain_info || hose->index; |
@@ -205,27 +212,6 @@ static int pcibios_enable_resources(struct pci_dev *dev, int mask) | |||
205 | return 0; | 212 | return 0; |
206 | } | 213 | } |
207 | 214 | ||
208 | /* | ||
209 | * If we set up a device for bus mastering, we need to check the latency | ||
210 | * timer as certain crappy BIOSes forget to set it properly. | ||
211 | */ | ||
212 | static unsigned int pcibios_max_latency = 255; | ||
213 | |||
214 | void pcibios_set_master(struct pci_dev *dev) | ||
215 | { | ||
216 | u8 lat; | ||
217 | pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat); | ||
218 | if (lat < 16) | ||
219 | lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency; | ||
220 | else if (lat > pcibios_max_latency) | ||
221 | lat = pcibios_max_latency; | ||
222 | else | ||
223 | return; | ||
224 | printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n", | ||
225 | pci_name(dev), lat); | ||
226 | pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat); | ||
227 | } | ||
228 | |||
229 | unsigned int pcibios_assign_all_busses(void) | 215 | unsigned int pcibios_assign_all_busses(void) |
230 | { | 216 | { |
231 | return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0; | 217 | return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0; |
@@ -266,15 +252,11 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus) | |||
266 | { | 252 | { |
267 | /* Propagate hose info into the subordinate devices. */ | 253 | /* Propagate hose info into the subordinate devices. */ |
268 | 254 | ||
269 | struct pci_controller *hose = bus->sysdata; | ||
270 | struct list_head *ln; | 255 | struct list_head *ln; |
271 | struct pci_dev *dev = bus->self; | 256 | struct pci_dev *dev = bus->self; |
272 | 257 | ||
273 | if (!dev) { | 258 | if (pci_probe_only && dev && |
274 | bus->resource[0] = hose->io_resource; | 259 | (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { |
275 | bus->resource[1] = hose->mem_resource; | ||
276 | } else if (pci_probe_only && | ||
277 | (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { | ||
278 | pci_read_bridge_bases(bus); | 260 | pci_read_bridge_bases(bus); |
279 | pcibios_fixup_device_resources(dev, bus); | 261 | pcibios_fixup_device_resources(dev, bus); |
280 | } | 262 | } |