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authorBrian Murphy <brm@murphy.dk>2007-08-21 16:34:16 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-10-11 18:46:00 -0400
commit1f21d2bde0046e959b53756f74d96dfd040a803b (patch)
tree5ca1a0319982f1e665e57f22bd1dae1d90b07e35 /arch/mips/pci/pci-lasat.c
parent0caf583398309398ec05fc76bff15c711e9f936d (diff)
[MIPS] Add back support for LASAT platforms
Signed-off-by: Brian Murphy <brian@murphy.dk> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci/pci-lasat.c')
-rw-r--r--arch/mips/pci/pci-lasat.c91
1 files changed, 91 insertions, 0 deletions
diff --git a/arch/mips/pci/pci-lasat.c b/arch/mips/pci/pci-lasat.c
new file mode 100644
index 000000000000..5abd5c7119be
--- /dev/null
+++ b/arch/mips/pci/pci-lasat.c
@@ -0,0 +1,91 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2000, 2001, 04 Keith M Wesolowski
7 */
8#include <linux/kernel.h>
9#include <linux/init.h>
10#include <linux/pci.h>
11#include <linux/types.h>
12#include <asm/bootinfo.h>
13
14extern struct pci_ops nile4_pci_ops;
15extern struct pci_ops gt64xxx_pci0_ops;
16static struct resource lasat_pci_mem_resource = {
17 .name = "LASAT PCI MEM",
18 .start = 0x18000000,
19 .end = 0x19ffffff,
20 .flags = IORESOURCE_MEM,
21};
22
23static struct resource lasat_pci_io_resource = {
24 .name = "LASAT PCI IO",
25 .start = 0x1a000000,
26 .end = 0x1bffffff,
27 .flags = IORESOURCE_IO,
28};
29
30static struct pci_controller lasat_pci_controller = {
31 .mem_resource = &lasat_pci_mem_resource,
32 .io_resource = &lasat_pci_io_resource,
33};
34
35static int __init lasat_pci_setup(void)
36{
37 printk(KERN_DEBUG "PCI: starting\n");
38
39 switch (mips_machtype) {
40 case MACH_LASAT_100:
41 lasat_pci_controller.pci_ops = &gt64xxx_pci0_ops;
42 break;
43 case MACH_LASAT_200:
44 lasat_pci_controller.pci_ops = &nile4_pci_ops;
45 break;
46 default:
47 panic("pcibios_init: mips_machtype incorrect");
48 }
49
50 register_pci_controller(&lasat_pci_controller);
51
52 return 0;
53}
54
55arch_initcall(lasat_pci_setup);
56
57#define LASATINT_ETH1 0
58#define LASATINT_ETH0 1
59#define LASATINT_HDC 2
60#define LASATINT_COMP 3
61#define LASATINT_HDLC 4
62#define LASATINT_PCIA 5
63#define LASATINT_PCIB 6
64#define LASATINT_PCIC 7
65#define LASATINT_PCID 8
66
67int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
68{
69 switch (slot) {
70 case 1:
71 case 2:
72 case 3:
73 return LASATINT_PCIA + (((slot-1) + (pin-1)) % 4);
74 case 4:
75 return LASATINT_ETH1; /* Ethernet 1 (LAN 2) */
76 case 5:
77 return LASATINT_ETH0; /* Ethernet 0 (LAN 1) */
78 case 6:
79 return LASATINT_HDC; /* IDE controller */
80 default:
81 return 0xff; /* Illegal */
82 }
83
84 return -1;
85}
86
87/* Do platform specific device initialization at pci_enable_device() time */
88int pcibios_plat_dev_init(struct pci_dev *dev)
89{
90 return 0;
91}