diff options
author | Gabor Juhos <juhosg@openwrt.org> | 2012-03-14 05:29:27 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2012-05-15 11:49:02 -0400 |
commit | c198441a3f3007752c551a32d5c426f48ae8712d (patch) | |
tree | bc9f3079006990681c5c87139079ea0537b4ecbf /arch/mips/pci/pci-ar724x.c | |
parent | d624bd3cf7835612b25b9ec8db4002624c2dbb32 (diff) |
MIPS: ath79: use io-accessor macros in pci-ar724x.c
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: René Bolldorf <xsecute@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3491/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci/pci-ar724x.c')
-rw-r--r-- | arch/mips/pci/pci-ar724x.c | 38 |
1 files changed, 24 insertions, 14 deletions
diff --git a/arch/mips/pci/pci-ar724x.c b/arch/mips/pci/pci-ar724x.c index 772d12c5fc9e..22f5e5bc4dfe 100644 --- a/arch/mips/pci/pci-ar724x.c +++ b/arch/mips/pci/pci-ar724x.c | |||
@@ -11,19 +11,19 @@ | |||
11 | #include <linux/pci.h> | 11 | #include <linux/pci.h> |
12 | #include <asm/mach-ath79/pci.h> | 12 | #include <asm/mach-ath79/pci.h> |
13 | 13 | ||
14 | #define reg_read(_phys) (*(unsigned int *) KSEG1ADDR(_phys)) | 14 | #define AR724X_PCI_CFG_BASE 0x14000000 |
15 | #define reg_write(_phys, _val) ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val)) | 15 | #define AR724X_PCI_CFG_SIZE 0x1000 |
16 | |||
17 | #define AR724X_PCI_DEV_BASE 0x14000000 | ||
18 | #define AR724X_PCI_MEM_BASE 0x10000000 | 16 | #define AR724X_PCI_MEM_BASE 0x10000000 |
19 | #define AR724X_PCI_MEM_SIZE 0x08000000 | 17 | #define AR724X_PCI_MEM_SIZE 0x08000000 |
20 | 18 | ||
21 | static DEFINE_SPINLOCK(ar724x_pci_lock); | 19 | static DEFINE_SPINLOCK(ar724x_pci_lock); |
20 | static void __iomem *ar724x_pci_devcfg_base; | ||
22 | 21 | ||
23 | static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, | 22 | static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, |
24 | int size, uint32_t *value) | 23 | int size, uint32_t *value) |
25 | { | 24 | { |
26 | unsigned long flags, addr, tval, mask; | 25 | unsigned long flags, addr, tval, mask; |
26 | void __iomem *base; | ||
27 | 27 | ||
28 | if (devfn) | 28 | if (devfn) |
29 | return PCIBIOS_DEVICE_NOT_FOUND; | 29 | return PCIBIOS_DEVICE_NOT_FOUND; |
@@ -31,25 +31,27 @@ static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, | |||
31 | if (where & (size - 1)) | 31 | if (where & (size - 1)) |
32 | return PCIBIOS_BAD_REGISTER_NUMBER; | 32 | return PCIBIOS_BAD_REGISTER_NUMBER; |
33 | 33 | ||
34 | base = ar724x_pci_devcfg_base; | ||
35 | |||
34 | spin_lock_irqsave(&ar724x_pci_lock, flags); | 36 | spin_lock_irqsave(&ar724x_pci_lock, flags); |
35 | 37 | ||
36 | switch (size) { | 38 | switch (size) { |
37 | case 1: | 39 | case 1: |
38 | addr = where & ~3; | 40 | addr = where & ~3; |
39 | mask = 0xff000000 >> ((where % 4) * 8); | 41 | mask = 0xff000000 >> ((where % 4) * 8); |
40 | tval = reg_read(AR724X_PCI_DEV_BASE + addr); | 42 | tval = __raw_readl(base + addr); |
41 | tval = tval & ~mask; | 43 | tval = tval & ~mask; |
42 | *value = (tval >> ((4 - (where % 4))*8)); | 44 | *value = (tval >> ((4 - (where % 4))*8)); |
43 | break; | 45 | break; |
44 | case 2: | 46 | case 2: |
45 | addr = where & ~3; | 47 | addr = where & ~3; |
46 | mask = 0xffff0000 >> ((where % 4)*8); | 48 | mask = 0xffff0000 >> ((where % 4)*8); |
47 | tval = reg_read(AR724X_PCI_DEV_BASE + addr); | 49 | tval = __raw_readl(base + addr); |
48 | tval = tval & ~mask; | 50 | tval = tval & ~mask; |
49 | *value = (tval >> ((4 - (where % 4))*8)); | 51 | *value = (tval >> ((4 - (where % 4))*8)); |
50 | break; | 52 | break; |
51 | case 4: | 53 | case 4: |
52 | *value = reg_read(AR724X_PCI_DEV_BASE + where); | 54 | *value = __raw_readl(base + where); |
53 | break; | 55 | break; |
54 | default: | 56 | default: |
55 | spin_unlock_irqrestore(&ar724x_pci_lock, flags); | 57 | spin_unlock_irqrestore(&ar724x_pci_lock, flags); |
@@ -66,6 +68,7 @@ static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where, | |||
66 | int size, uint32_t value) | 68 | int size, uint32_t value) |
67 | { | 69 | { |
68 | unsigned long flags, tval, addr, mask; | 70 | unsigned long flags, tval, addr, mask; |
71 | void __iomem *base; | ||
69 | 72 | ||
70 | if (devfn) | 73 | if (devfn) |
71 | return PCIBIOS_DEVICE_NOT_FOUND; | 74 | return PCIBIOS_DEVICE_NOT_FOUND; |
@@ -73,27 +76,29 @@ static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where, | |||
73 | if (where & (size - 1)) | 76 | if (where & (size - 1)) |
74 | return PCIBIOS_BAD_REGISTER_NUMBER; | 77 | return PCIBIOS_BAD_REGISTER_NUMBER; |
75 | 78 | ||
79 | base = ar724x_pci_devcfg_base; | ||
80 | |||
76 | spin_lock_irqsave(&ar724x_pci_lock, flags); | 81 | spin_lock_irqsave(&ar724x_pci_lock, flags); |
77 | 82 | ||
78 | switch (size) { | 83 | switch (size) { |
79 | case 1: | 84 | case 1: |
80 | addr = (AR724X_PCI_DEV_BASE + where) & ~3; | 85 | addr = where & ~3; |
81 | mask = 0xff000000 >> ((where % 4)*8); | 86 | mask = 0xff000000 >> ((where % 4)*8); |
82 | tval = reg_read(addr); | 87 | tval = __raw_readl(base + addr); |
83 | tval = tval & ~mask; | 88 | tval = tval & ~mask; |
84 | tval |= (value << ((4 - (where % 4))*8)) & mask; | 89 | tval |= (value << ((4 - (where % 4))*8)) & mask; |
85 | reg_write(addr, tval); | 90 | __raw_writel(tval, base + addr); |
86 | break; | 91 | break; |
87 | case 2: | 92 | case 2: |
88 | addr = (AR724X_PCI_DEV_BASE + where) & ~3; | 93 | addr = where & ~3; |
89 | mask = 0xffff0000 >> ((where % 4)*8); | 94 | mask = 0xffff0000 >> ((where % 4)*8); |
90 | tval = reg_read(addr); | 95 | tval = __raw_readl(base + addr); |
91 | tval = tval & ~mask; | 96 | tval = tval & ~mask; |
92 | tval |= (value << ((4 - (where % 4))*8)) & mask; | 97 | tval |= (value << ((4 - (where % 4))*8)) & mask; |
93 | reg_write(addr, tval); | 98 | __raw_writel(tval, base + addr); |
94 | break; | 99 | break; |
95 | case 4: | 100 | case 4: |
96 | reg_write((AR724X_PCI_DEV_BASE + where), value); | 101 | __raw_writel(value, (base + where)); |
97 | break; | 102 | break; |
98 | default: | 103 | default: |
99 | spin_unlock_irqrestore(&ar724x_pci_lock, flags); | 104 | spin_unlock_irqrestore(&ar724x_pci_lock, flags); |
@@ -133,6 +138,11 @@ static struct pci_controller ar724x_pci_controller = { | |||
133 | 138 | ||
134 | int __init ar724x_pcibios_init(void) | 139 | int __init ar724x_pcibios_init(void) |
135 | { | 140 | { |
141 | ar724x_pci_devcfg_base = ioremap(AR724X_PCI_CFG_BASE, | ||
142 | AR724X_PCI_CFG_SIZE); | ||
143 | if (ar724x_pci_devcfg_base == NULL) | ||
144 | return -ENOMEM; | ||
145 | |||
136 | register_pci_controller(&ar724x_pci_controller); | 146 | register_pci_controller(&ar724x_pci_controller); |
137 | 147 | ||
138 | return PCIBIOS_SUCCESSFUL; | 148 | return PCIBIOS_SUCCESSFUL; |