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authorManuel Lauss <manuel.lauss@gmail.com>2014-07-23 10:36:51 -0400
committerRalf Baechle <ralf@linux-mips.org>2014-07-30 08:09:42 -0400
commit8e21170581d99038c41c803af289e1a6491cb145 (patch)
tree81a4d1e8499a6b3c8902bb24fa7e797fc5ff0240 /arch/mips/pci/pci-alchemy.c
parent3feae78416ae2c30f12c0a4bbe2e5dddf029510d (diff)
MIPS: Alchemy: pci: use clk framework to enable PCI clock
Use the clock framework to get at the PCI clock source and enable it on driver initialization. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7471/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci/pci-alchemy.c')
-rw-r--r--arch/mips/pci/pci-alchemy.c24
1 files changed, 23 insertions, 1 deletions
diff --git a/arch/mips/pci/pci-alchemy.c b/arch/mips/pci/pci-alchemy.c
index 563d1f61d6ee..c19600a03460 100644
--- a/arch/mips/pci/pci-alchemy.c
+++ b/arch/mips/pci/pci-alchemy.c
@@ -7,6 +7,7 @@
7 * Support for all devices (greater than 16) added by David Gathright. 7 * Support for all devices (greater than 16) added by David Gathright.
8 */ 8 */
9 9
10#include <linux/clk.h>
10#include <linux/export.h> 11#include <linux/export.h>
11#include <linux/types.h> 12#include <linux/types.h>
12#include <linux/pci.h> 13#include <linux/pci.h>
@@ -364,6 +365,7 @@ static int alchemy_pci_probe(struct platform_device *pdev)
364 void __iomem *virt_io; 365 void __iomem *virt_io;
365 unsigned long val; 366 unsigned long val;
366 struct resource *r; 367 struct resource *r;
368 struct clk *c;
367 int ret; 369 int ret;
368 370
369 /* need at least PCI IRQ mapping table */ 371 /* need at least PCI IRQ mapping table */
@@ -393,11 +395,24 @@ static int alchemy_pci_probe(struct platform_device *pdev)
393 goto out1; 395 goto out1;
394 } 396 }
395 397
398 c = clk_get(&pdev->dev, "pci_clko");
399 if (IS_ERR(c)) {
400 dev_err(&pdev->dev, "unable to find PCI clock\n");
401 ret = PTR_ERR(c);
402 goto out2;
403 }
404
405 ret = clk_prepare_enable(c);
406 if (ret) {
407 dev_err(&pdev->dev, "cannot enable PCI clock\n");
408 goto out6;
409 }
410
396 ctx->regs = ioremap_nocache(r->start, resource_size(r)); 411 ctx->regs = ioremap_nocache(r->start, resource_size(r));
397 if (!ctx->regs) { 412 if (!ctx->regs) {
398 dev_err(&pdev->dev, "cannot map pci regs\n"); 413 dev_err(&pdev->dev, "cannot map pci regs\n");
399 ret = -ENODEV; 414 ret = -ENODEV;
400 goto out2; 415 goto out5;
401 } 416 }
402 417
403 /* map parts of the PCI IO area */ 418 /* map parts of the PCI IO area */
@@ -465,12 +480,19 @@ static int alchemy_pci_probe(struct platform_device *pdev)
465 register_syscore_ops(&alchemy_pci_pmops); 480 register_syscore_ops(&alchemy_pci_pmops);
466 register_pci_controller(&ctx->alchemy_pci_ctrl); 481 register_pci_controller(&ctx->alchemy_pci_ctrl);
467 482
483 dev_info(&pdev->dev, "PCI controller at %ld MHz\n",
484 clk_get_rate(c) / 1000000);
485
468 return 0; 486 return 0;
469 487
470out4: 488out4:
471 iounmap(virt_io); 489 iounmap(virt_io);
472out3: 490out3:
473 iounmap(ctx->regs); 491 iounmap(ctx->regs);
492out5:
493 clk_disable_unprepare(c);
494out6:
495 clk_put(c);
474out2: 496out2:
475 release_mem_region(r->start, resource_size(r)); 497 release_mem_region(r->start, resource_size(r));
476out1: 498out1: