diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2013-01-22 06:59:30 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2013-02-01 04:00:22 -0500 |
commit | 7034228792cc561e79ff8600f02884bd4c80e287 (patch) | |
tree | 89b77af37d087d9de236fc5d21f60bf552d0a2c6 /arch/mips/pci/ops-msc.c | |
parent | 405ab01c70e18058d9c01a1256769a61fc65413e (diff) |
MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci/ops-msc.c')
-rw-r--r-- | arch/mips/pci/ops-msc.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/mips/pci/ops-msc.c b/arch/mips/pci/ops-msc.c index 5d9fbb0f4670..92a8543361bb 100644 --- a/arch/mips/pci/ops-msc.c +++ b/arch/mips/pci/ops-msc.c | |||
@@ -1,8 +1,8 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 1999, 2000, 2004, 2005 MIPS Technologies, Inc. | 2 | * Copyright (C) 1999, 2000, 2004, 2005 MIPS Technologies, Inc. |
3 | * All rights reserved. | 3 | * All rights reserved. |
4 | * Authors: Carsten Langgaard <carstenl@mips.com> | 4 | * Authors: Carsten Langgaard <carstenl@mips.com> |
5 | * Maciej W. Rozycki <macro@mips.com> | 5 | * Maciej W. Rozycki <macro@mips.com> |
6 | * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) | 6 | * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) |
7 | * | 7 | * |
8 | * This program is free software; you can distribute it and/or modify it | 8 | * This program is free software; you can distribute it and/or modify it |
@@ -28,21 +28,21 @@ | |||
28 | 28 | ||
29 | #include <asm/mips-boards/msc01_pci.h> | 29 | #include <asm/mips-boards/msc01_pci.h> |
30 | 30 | ||
31 | #define PCI_ACCESS_READ 0 | 31 | #define PCI_ACCESS_READ 0 |
32 | #define PCI_ACCESS_WRITE 1 | 32 | #define PCI_ACCESS_WRITE 1 |
33 | 33 | ||
34 | /* | 34 | /* |
35 | * PCI configuration cycle AD bus definition | 35 | * PCI configuration cycle AD bus definition |
36 | */ | 36 | */ |
37 | /* Type 0 */ | 37 | /* Type 0 */ |
38 | #define PCI_CFG_TYPE0_REG_SHF 0 | 38 | #define PCI_CFG_TYPE0_REG_SHF 0 |
39 | #define PCI_CFG_TYPE0_FUNC_SHF 8 | 39 | #define PCI_CFG_TYPE0_FUNC_SHF 8 |
40 | 40 | ||
41 | /* Type 1 */ | 41 | /* Type 1 */ |
42 | #define PCI_CFG_TYPE1_REG_SHF 0 | 42 | #define PCI_CFG_TYPE1_REG_SHF 0 |
43 | #define PCI_CFG_TYPE1_FUNC_SHF 8 | 43 | #define PCI_CFG_TYPE1_FUNC_SHF 8 |
44 | #define PCI_CFG_TYPE1_DEV_SHF 11 | 44 | #define PCI_CFG_TYPE1_DEV_SHF 11 |
45 | #define PCI_CFG_TYPE1_BUS_SHF 16 | 45 | #define PCI_CFG_TYPE1_BUS_SHF 16 |
46 | 46 | ||
47 | static int msc_pcibios_config_access(unsigned char access_type, | 47 | static int msc_pcibios_config_access(unsigned char access_type, |
48 | struct pci_bus *bus, unsigned int devfn, int where, u32 * data) | 48 | struct pci_bus *bus, unsigned int devfn, int where, u32 * data) |
@@ -97,7 +97,7 @@ static int msc_pcibios_read(struct pci_bus *bus, unsigned int devfn, | |||
97 | return PCIBIOS_BAD_REGISTER_NUMBER; | 97 | return PCIBIOS_BAD_REGISTER_NUMBER; |
98 | 98 | ||
99 | if (msc_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, | 99 | if (msc_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, |
100 | &data)) | 100 | &data)) |
101 | return -1; | 101 | return -1; |
102 | 102 | ||
103 | if (size == 1) | 103 | if (size == 1) |
@@ -124,7 +124,7 @@ static int msc_pcibios_write(struct pci_bus *bus, unsigned int devfn, | |||
124 | data = val; | 124 | data = val; |
125 | else { | 125 | else { |
126 | if (msc_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, | 126 | if (msc_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, |
127 | where, &data)) | 127 | where, &data)) |
128 | return -1; | 128 | return -1; |
129 | 129 | ||
130 | if (size == 1) | 130 | if (size == 1) |