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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2008-07-10 11:33:08 -0400
committerRalf Baechle <ralf@linux-mips.org>2008-07-15 13:44:35 -0400
commit89d63fe179520b11f54de1f26755b7444c79e73a (patch)
treefede06c5648335652c864fc35c951d991cbab183 /arch/mips/pci/fixup-jmr3927.c
parent22b1d707ffc99faebd86257ad19d5bb9fc624734 (diff)
[MIPS] TXx9: Reorganize PCI code
Split out PCIC dependent code and SoC dependent code from board dependent code. Now TX4927 PCIC code is independent from TX4927/TX4938 SoC code. Also fix some build problems on CONFIG_PCI=n. As a bonus, "FPCIB0 Backplane Support" is available for all TX39/TX49 boards and PCI66 support is available for all TX49 boards. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci/fixup-jmr3927.c')
-rw-r--r--arch/mips/pci/fixup-jmr3927.c25
1 files changed, 9 insertions, 16 deletions
diff --git a/arch/mips/pci/fixup-jmr3927.c b/arch/mips/pci/fixup-jmr3927.c
index 41dcd6a3aae5..d5edaf21e088 100644
--- a/arch/mips/pci/fixup-jmr3927.c
+++ b/arch/mips/pci/fixup-jmr3927.c
@@ -28,36 +28,31 @@
28 * 675 Mass Ave, Cambridge, MA 02139, USA. 28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */ 29 */
30#include <linux/types.h> 30#include <linux/types.h>
31#include <linux/pci.h> 31#include <asm/txx9/pci.h>
32#include <linux/init.h>
33
34#include <asm/txx9/jmr3927.h> 32#include <asm/txx9/jmr3927.h>
35 33
36int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 34int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
37{ 35{
38 unsigned char irq = pin; 36 unsigned char irq = pin;
39 37
40 /* SMSC SLC90E66 IDE uses irq 14, 15 (default) */
41 if (dev->vendor == PCI_VENDOR_ID_EFAR &&
42 dev->device == PCI_DEVICE_ID_EFAR_SLC90E66_1)
43 return irq;
44 /* IRQ rotation (PICMG) */ 38 /* IRQ rotation (PICMG) */
45 irq--; /* 0-3 */ 39 irq--; /* 0-3 */
46 if (dev->bus->parent == NULL && 40 if (slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(23)) {
47 slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(23)) {
48 /* PCI CardSlot (IDSEL=A23, DevNu=12) */ 41 /* PCI CardSlot (IDSEL=A23, DevNu=12) */
49 /* PCIA => PCIC (IDSEL=A23) */ 42 /* PCIA => PCIC (IDSEL=A23) */
50 /* NOTE: JMR3927 JP1 must be set to OPEN */ 43 /* NOTE: JMR3927 JP1 must be set to OPEN */
51 irq = (irq + 2) % 4; 44 irq = (irq + 2) % 4;
52 } else if (dev->bus->parent == NULL && 45 } else if (slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(22)) {
53 slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(22)) {
54 /* PCI CardSlot (IDSEL=A22, DevNu=11) */ 46 /* PCI CardSlot (IDSEL=A22, DevNu=11) */
55 /* PCIA => PCIA (IDSEL=A22) */ 47 /* PCIA => PCIA (IDSEL=A22) */
56 /* NOTE: JMR3927 JP1 must be set to OPEN */ 48 /* NOTE: JMR3927 JP1 must be set to OPEN */
57 irq = (irq + 0) % 4; 49 irq = (irq + 0) % 4;
58 } else { 50 } else {
59 /* PCI Backplane */ 51 /* PCI Backplane */
60 irq = (irq + 3 + slot) % 4; 52 if (txx9_pci_option & TXX9_PCI_OPT_PICMG)
53 irq = (irq + 33 - slot) % 4;
54 else
55 irq = (irq + 3 + slot) % 4;
61 } 56 }
62 irq++; /* 1-4 */ 57 irq++; /* 1-4 */
63 58
@@ -66,15 +61,13 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
66 irq = JMR3927_IRQ_IOC_PCIA; 61 irq = JMR3927_IRQ_IOC_PCIA;
67 break; 62 break;
68 case 2: 63 case 2:
69 // wrong for backplane irq = JMR3927_IRQ_IOC_PCIB; 64 irq = JMR3927_IRQ_IOC_PCIB;
70 irq = JMR3927_IRQ_IOC_PCID;
71 break; 65 break;
72 case 3: 66 case 3:
73 irq = JMR3927_IRQ_IOC_PCIC; 67 irq = JMR3927_IRQ_IOC_PCIC;
74 break; 68 break;
75 case 4: 69 case 4:
76 // wrong for backplane irq = JMR3927_IRQ_IOC_PCID; 70 irq = JMR3927_IRQ_IOC_PCID;
77 irq = JMR3927_IRQ_IOC_PCIB;
78 break; 71 break;
79 } 72 }
80 73