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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/mips/pci/fixup-ip32.c
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'arch/mips/pci/fixup-ip32.c')
-rw-r--r--arch/mips/pci/fixup-ip32.c51
1 files changed, 51 insertions, 0 deletions
diff --git a/arch/mips/pci/fixup-ip32.c b/arch/mips/pci/fixup-ip32.c
new file mode 100644
index 000000000000..3e66b0aa63ca
--- /dev/null
+++ b/arch/mips/pci/fixup-ip32.c
@@ -0,0 +1,51 @@
1#include <linux/init.h>
2#include <linux/kernel.h>
3#include <linux/pci.h>
4#include <asm/ip32/ip32_ints.h>
5/*
6 * O2 has up to 5 PCI devices connected into the MACE bridge. The device
7 * map looks like this:
8 *
9 * 0 aic7xxx 0
10 * 1 aic7xxx 1
11 * 2 expansion slot
12 * 3 N/C
13 * 4 N/C
14 */
15
16#define SCSI0 MACEPCI_SCSI0_IRQ
17#define SCSI1 MACEPCI_SCSI1_IRQ
18#define INTA0 MACEPCI_SLOT0_IRQ
19#define INTA1 MACEPCI_SLOT1_IRQ
20#define INTA2 MACEPCI_SLOT2_IRQ
21#define INTB MACEPCI_SHARED0_IRQ
22#define INTC MACEPCI_SHARED1_IRQ
23#define INTD MACEPCI_SHARED2_IRQ
24static char irq_tab_mace[][5] __initdata = {
25 /* Dummy INT#A INT#B INT#C INT#D */
26 {0, 0, 0, 0, 0}, /* This is placeholder row - never used */
27 {0, SCSI0, SCSI0, SCSI0, SCSI0},
28 {0, SCSI1, SCSI1, SCSI1, SCSI1},
29 {0, INTA0, INTB, INTC, INTD},
30 {0, INTA1, INTC, INTD, INTB},
31 {0, INTA2, INTD, INTB, INTC},
32};
33
34
35/*
36 * Given a PCI slot number (a la PCI_SLOT(...)) and the interrupt pin of
37 * the device (1-4 => A-D), tell what irq to use. Note that we don't
38 * in theory have slots 4 and 5, and we never normally use the shared
39 * irqs. I suppose a device without a pin A will thank us for doing it
40 * right if there exists such a broken piece of crap.
41 */
42int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
43{
44 return irq_tab_mace[slot][pin];
45}
46
47/* Do platform specific device initialization at pci_enable_device() time */
48int pcibios_plat_dev_init(struct pci_dev *dev)
49{
50 return 0;
51}