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authorRalf Baechle <ralf@linux-mips.org>2013-01-22 06:59:30 -0500
committerRalf Baechle <ralf@linux-mips.org>2013-02-01 04:00:22 -0500
commit7034228792cc561e79ff8600f02884bd4c80e287 (patch)
tree89b77af37d087d9de236fc5d21f60bf552d0a2c6 /arch/mips/pci/fixup-fuloong2e.c
parent405ab01c70e18058d9c01a1256769a61fc65413e (diff)
MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci/fixup-fuloong2e.c')
-rw-r--r--arch/mips/pci/fixup-fuloong2e.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/mips/pci/fixup-fuloong2e.c b/arch/mips/pci/fixup-fuloong2e.c
index 63ab4a042cd6..50da773faede 100644
--- a/arch/mips/pci/fixup-fuloong2e.c
+++ b/arch/mips/pci/fixup-fuloong2e.c
@@ -6,9 +6,9 @@
6 * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology 6 * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
7 * Author: Fuxin Zhang, zhangfx@lemote.com 7 * Author: Fuxin Zhang, zhangfx@lemote.com
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify it 9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the 10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your 11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version. 12 * option) any later version.
13 */ 13 */
14#include <linux/init.h> 14#include <linux/init.h>
@@ -152,7 +152,7 @@ static void loongson2e_686b_func1_fixup(struct pci_dev *pdev)
152 /* disable read prefetch/write post buffers */ 152 /* disable read prefetch/write post buffers */
153 pci_write_config_byte(pdev, 0x41, 0x02); 153 pci_write_config_byte(pdev, 0x41, 0x02);
154 154
155 /* use 3/4 as fifo thresh hold */ 155 /* use 3/4 as fifo thresh hold */
156 pci_write_config_byte(pdev, 0x43, 0x0a); 156 pci_write_config_byte(pdev, 0x43, 0x0a);
157 pci_write_config_byte(pdev, 0x44, 0x00); 157 pci_write_config_byte(pdev, 0x44, 0x00);
158 158