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authorMaciej W. Rozycki <macro@linux-mips.org>2005-02-01 07:02:37 -0500
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 14:30:19 -0400
commitbec0204dfb35cd5b91c0b34f97a481f363f6b272 (patch)
tree75c908e1d38057e2ccdd2fecc8d45d78e01d7ca8 /arch/mips/pci/fixup-atlas.c
parentc6237645d1e9e687031048f5ffd343133fddb55c (diff)
Actually route cPCI interrupts. Update inaccurate comments.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci/fixup-atlas.c')
-rw-r--r--arch/mips/pci/fixup-atlas.c41
1 files changed, 32 insertions, 9 deletions
diff --git a/arch/mips/pci/fixup-atlas.c b/arch/mips/pci/fixup-atlas.c
index 2406835833d6..87920b245931 100644
--- a/arch/mips/pci/fixup-atlas.c
+++ b/arch/mips/pci/fixup-atlas.c
@@ -1,14 +1,37 @@
1/*
2 * Copyright (C) 2003, 2004 Ralf Baechle (ralf@linux-mips.org)
3 * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
4 * Author: Maciej W. Rozycki <macro@mips.com>
5 *
6 * This program is free software; you can distribute it and/or modify it
7 * under the terms of the GNU General Public License (Version 2) as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
18 */
1#include <linux/config.h> 19#include <linux/config.h>
2#include <linux/init.h> 20#include <linux/init.h>
3#include <linux/pci.h> 21#include <linux/pci.h>
22
4#include <asm/mips-boards/atlasint.h> 23#include <asm/mips-boards/atlasint.h>
5 24
6#define INTD ATLASINT_INTD 25#define PCIA ATLASINT_PCIA
7#define INTC ATLASINT_INTC 26#define PCIB ATLASINT_PCIB
8#define INTB ATLASINT_INTB 27#define PCIC ATLASINT_PCIC
28#define PCID ATLASINT_PCID
9#define INTA ATLASINT_INTA 29#define INTA ATLASINT_INTA
10#define SCSI ATLASINT_SCSI 30#define INTB ATLASINT_INTB
11#define ETH ATLASINT_ETH 31#define ETH ATLASINT_ETH
32#define INTC ATLASINT_INTC
33#define SCSI ATLASINT_SCSI
34#define INTD ATLASINT_INTD
12 35
13static char irq_tab[][5] __initdata = { 36static char irq_tab[][5] __initdata = {
14 /* INTA INTB INTC INTD */ 37 /* INTA INTB INTC INTD */
@@ -27,13 +50,13 @@ static char irq_tab[][5] __initdata = {
27 {0, 0, 0, 0, 0 }, /* 12: Unused */ 50 {0, 0, 0, 0, 0 }, /* 12: Unused */
28 {0, 0, 0, 0, 0 }, /* 13: Unused */ 51 {0, 0, 0, 0, 0 }, /* 13: Unused */
29 {0, 0, 0, 0, 0 }, /* 14: Unused */ 52 {0, 0, 0, 0, 0 }, /* 14: Unused */
30 {0, 0, 0, 0, 0 }, /* 15: Unused */ 53 {0, PCIA, PCIB, PCIC, PCID }, /* 15: cPCI (behind 21150) */
31 {0, SCSI, 0, 0, 0 }, /* 16: SYM53C810A SCSI */ 54 {0, SCSI, 0, 0, 0 }, /* 16: SYM53C810A SCSI */
32 {0, 0, 0, 0, 0 }, /* 17: Core */ 55 {0, 0, 0, 0, 0 }, /* 17: Core */
33 {0, INTA, INTB, INTC, INTD }, /* 18: PCI Slot 1 */ 56 {0, INTA, INTB, INTC, INTD }, /* 18: PCI Slot */
34 {0, ETH, 0, 0, 0 }, /* 19: SAA9730 Ethernet */ 57 {0, ETH, 0, 0, 0 }, /* 19: SAA9730 Eth. et al. */
35 {0, 0, 0, 0, 0 }, /* 20: PCI Slot 3 */ 58 {0, 0, 0, 0, 0 }, /* 20: Unused */
36 {0, 0, 0, 0, 0 } /* 21: PCI Slot 4 */ 59 {0, 0, 0, 0, 0 } /* 21: Unused */
37}; 60};
38 61
39int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) 62int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)