diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2008-04-28 12:14:26 -0400 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2008-04-28 12:14:26 -0400 |
commit | 39b8d5254246ac56342b72f812255c8f7a74dca9 (patch) | |
tree | a9ec6bfb5d09a8367c34cc2067328d1b49bb46c1 /arch/mips/oprofile | |
parent | 308402445e005a039a72b315cd9b5ceeaea0063c (diff) |
[MIPS] Add support for MIPS CMP platform.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/oprofile')
-rw-r--r-- | arch/mips/oprofile/common.c | 1 | ||||
-rw-r--r-- | arch/mips/oprofile/op_model_mipsxx.c | 34 |
2 files changed, 25 insertions, 10 deletions
diff --git a/arch/mips/oprofile/common.c b/arch/mips/oprofile/common.c index aa52aa146cea..b5f6f71b27bc 100644 --- a/arch/mips/oprofile/common.c +++ b/arch/mips/oprofile/common.c | |||
@@ -80,6 +80,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops) | |||
80 | case CPU_24K: | 80 | case CPU_24K: |
81 | case CPU_25KF: | 81 | case CPU_25KF: |
82 | case CPU_34K: | 82 | case CPU_34K: |
83 | case CPU_1004K: | ||
83 | case CPU_74K: | 84 | case CPU_74K: |
84 | case CPU_SB1: | 85 | case CPU_SB1: |
85 | case CPU_SB1A: | 86 | case CPU_SB1A: |
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c index ccbea229a0e6..ca65469d7e30 100644 --- a/arch/mips/oprofile/op_model_mipsxx.c +++ b/arch/mips/oprofile/op_model_mipsxx.c | |||
@@ -32,8 +32,11 @@ | |||
32 | #define M_COUNTER_OVERFLOW (1UL << 31) | 32 | #define M_COUNTER_OVERFLOW (1UL << 31) |
33 | 33 | ||
34 | #ifdef CONFIG_MIPS_MT_SMP | 34 | #ifdef CONFIG_MIPS_MT_SMP |
35 | #define WHAT (M_TC_EN_VPE | M_PERFCTL_VPEID(smp_processor_id())) | 35 | static int cpu_has_mipsmt_pertccounters; |
36 | #define vpe_id() smp_processor_id() | 36 | #define WHAT (M_TC_EN_VPE | \ |
37 | M_PERFCTL_VPEID(cpu_data[smp_processor_id()].vpe_id)) | ||
38 | #define vpe_id() (cpu_has_mipsmt_pertccounters ? \ | ||
39 | 0 : cpu_data[smp_processor_id()].vpe_id) | ||
37 | 40 | ||
38 | /* | 41 | /* |
39 | * The number of bits to shift to convert between counters per core and | 42 | * The number of bits to shift to convert between counters per core and |
@@ -243,11 +246,11 @@ static inline int __n_counters(void) | |||
243 | { | 246 | { |
244 | if (!(read_c0_config1() & M_CONFIG1_PC)) | 247 | if (!(read_c0_config1() & M_CONFIG1_PC)) |
245 | return 0; | 248 | return 0; |
246 | if (!(r_c0_perfctrl0() & M_PERFCTL_MORE)) | 249 | if (!(read_c0_perfctrl0() & M_PERFCTL_MORE)) |
247 | return 1; | 250 | return 1; |
248 | if (!(r_c0_perfctrl1() & M_PERFCTL_MORE)) | 251 | if (!(read_c0_perfctrl1() & M_PERFCTL_MORE)) |
249 | return 2; | 252 | return 2; |
250 | if (!(r_c0_perfctrl2() & M_PERFCTL_MORE)) | 253 | if (!(read_c0_perfctrl2() & M_PERFCTL_MORE)) |
251 | return 3; | 254 | return 3; |
252 | 255 | ||
253 | return 4; | 256 | return 4; |
@@ -274,8 +277,9 @@ static inline int n_counters(void) | |||
274 | return counters; | 277 | return counters; |
275 | } | 278 | } |
276 | 279 | ||
277 | static inline void reset_counters(int counters) | 280 | static void reset_counters(void *arg) |
278 | { | 281 | { |
282 | int counters = (int)arg; | ||
279 | switch (counters) { | 283 | switch (counters) { |
280 | case 4: | 284 | case 4: |
281 | w_c0_perfctrl3(0); | 285 | w_c0_perfctrl3(0); |
@@ -302,9 +306,12 @@ static int __init mipsxx_init(void) | |||
302 | return -ENODEV; | 306 | return -ENODEV; |
303 | } | 307 | } |
304 | 308 | ||
305 | reset_counters(counters); | 309 | #ifdef CONFIG_MIPS_MT_SMP |
306 | 310 | cpu_has_mipsmt_pertccounters = read_c0_config7() & (1<<19); | |
307 | counters = counters_total_to_per_cpu(counters); | 311 | if (!cpu_has_mipsmt_pertccounters) |
312 | counters = counters_total_to_per_cpu(counters); | ||
313 | #endif | ||
314 | on_each_cpu(reset_counters, (void *)counters, 0, 1); | ||
308 | 315 | ||
309 | op_model_mipsxx_ops.num_counters = counters; | 316 | op_model_mipsxx_ops.num_counters = counters; |
310 | switch (current_cpu_type()) { | 317 | switch (current_cpu_type()) { |
@@ -320,6 +327,13 @@ static int __init mipsxx_init(void) | |||
320 | op_model_mipsxx_ops.cpu_type = "mips/25K"; | 327 | op_model_mipsxx_ops.cpu_type = "mips/25K"; |
321 | break; | 328 | break; |
322 | 329 | ||
330 | case CPU_1004K: | ||
331 | #if 0 | ||
332 | /* FIXME: report as 34K for now */ | ||
333 | op_model_mipsxx_ops.cpu_type = "mips/1004K"; | ||
334 | break; | ||
335 | #endif | ||
336 | |||
323 | case CPU_34K: | 337 | case CPU_34K: |
324 | op_model_mipsxx_ops.cpu_type = "mips/34K"; | 338 | op_model_mipsxx_ops.cpu_type = "mips/34K"; |
325 | break; | 339 | break; |
@@ -365,7 +379,7 @@ static void mipsxx_exit(void) | |||
365 | int counters = op_model_mipsxx_ops.num_counters; | 379 | int counters = op_model_mipsxx_ops.num_counters; |
366 | 380 | ||
367 | counters = counters_per_cpu_to_total(counters); | 381 | counters = counters_per_cpu_to_total(counters); |
368 | reset_counters(counters); | 382 | on_each_cpu(reset_counters, (void *)counters, 0, 1); |
369 | 383 | ||
370 | perf_irq = null_perf_irq; | 384 | perf_irq = null_perf_irq; |
371 | } | 385 | } |