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authorIngo Molnar <mingo@elte.hu>2008-07-18 13:53:16 -0400
committerIngo Molnar <mingo@elte.hu>2008-07-18 13:53:16 -0400
commit9b610fda0df5d0f0b0c64242e37441ad1b384aac (patch)
tree0ea14b15f2e6546f37fe18d8ac3dc83077ec0e55 /arch/mips/nxp
parentb8f8c3cf0a4ac0632ec3f0e15e9dc0c29de917af (diff)
parent5b664cb235e97afbf34db9c4d77f08ebd725335e (diff)
Merge branch 'linus' into timers/nohz
Diffstat (limited to 'arch/mips/nxp')
-rw-r--r--arch/mips/nxp/pnx8550/common/platform.c9
-rw-r--r--arch/mips/nxp/pnx8550/jbs/board_setup.c11
-rw-r--r--arch/mips/nxp/pnx8550/stb810/board_setup.c10
3 files changed, 7 insertions, 23 deletions
diff --git a/arch/mips/nxp/pnx8550/common/platform.c b/arch/mips/nxp/pnx8550/common/platform.c
index c7c763dbe588..21d2955359b3 100644
--- a/arch/mips/nxp/pnx8550/common/platform.c
+++ b/arch/mips/nxp/pnx8550/common/platform.c
@@ -13,6 +13,7 @@
13 * warranty of any kind, whether express or implied. 13 * warranty of any kind, whether express or implied.
14 */ 14 */
15#include <linux/device.h> 15#include <linux/device.h>
16#include <linux/dma-mapping.h>
16#include <linux/kernel.h> 17#include <linux/kernel.h>
17#include <linux/init.h> 18#include <linux/init.h>
18#include <linux/resource.h> 19#include <linux/resource.h>
@@ -91,16 +92,16 @@ struct pnx8xxx_port pnx8xxx_ports[] = {
91}; 92};
92 93
93/* The dmamask must be set for OHCI to work */ 94/* The dmamask must be set for OHCI to work */
94static u64 ohci_dmamask = ~(u32)0; 95static u64 ohci_dmamask = DMA_32BIT_MASK;
95 96
96static u64 uart_dmamask = ~(u32)0; 97static u64 uart_dmamask = DMA_32BIT_MASK;
97 98
98static struct platform_device pnx8550_usb_ohci_device = { 99static struct platform_device pnx8550_usb_ohci_device = {
99 .name = "pnx8550-ohci", 100 .name = "pnx8550-ohci",
100 .id = -1, 101 .id = -1,
101 .dev = { 102 .dev = {
102 .dma_mask = &ohci_dmamask, 103 .dma_mask = &ohci_dmamask,
103 .coherent_dma_mask = 0xffffffff, 104 .coherent_dma_mask = DMA_32BIT_MASK,
104 }, 105 },
105 .num_resources = ARRAY_SIZE(pnx8550_usb_ohci_resources), 106 .num_resources = ARRAY_SIZE(pnx8550_usb_ohci_resources),
106 .resource = pnx8550_usb_ohci_resources, 107 .resource = pnx8550_usb_ohci_resources,
@@ -111,7 +112,7 @@ static struct platform_device pnx8550_uart_device = {
111 .id = -1, 112 .id = -1,
112 .dev = { 113 .dev = {
113 .dma_mask = &uart_dmamask, 114 .dma_mask = &uart_dmamask,
114 .coherent_dma_mask = 0xffffffff, 115 .coherent_dma_mask = DMA_32BIT_MASK,
115 .platform_data = pnx8xxx_ports, 116 .platform_data = pnx8xxx_ports,
116 }, 117 },
117 .num_resources = ARRAY_SIZE(pnx8550_uart_resources), 118 .num_resources = ARRAY_SIZE(pnx8550_uart_resources),
diff --git a/arch/mips/nxp/pnx8550/jbs/board_setup.c b/arch/mips/nxp/pnx8550/jbs/board_setup.c
index f92826e0096d..57dd903ca408 100644
--- a/arch/mips/nxp/pnx8550/jbs/board_setup.c
+++ b/arch/mips/nxp/pnx8550/jbs/board_setup.c
@@ -47,16 +47,7 @@
47 47
48void __init board_setup(void) 48void __init board_setup(void)
49{ 49{
50 unsigned long config0, configpr; 50 unsigned long configpr;
51
52 config0 = read_c0_config();
53
54 /* clear all three cache coherency fields */
55 config0 &= ~(0x7 | (7<<25) | (7<<28));
56 config0 |= (CONF_CM_DEFAULT | (CONF_CM_DEFAULT<<25) |
57 (CONF_CM_DEFAULT<<28));
58 write_c0_config(config0);
59 BARRIER;
60 51
61 configpr = read_c0_config7(); 52 configpr = read_c0_config7();
62 configpr |= (1<<19); /* enable tlb */ 53 configpr |= (1<<19); /* enable tlb */
diff --git a/arch/mips/nxp/pnx8550/stb810/board_setup.c b/arch/mips/nxp/pnx8550/stb810/board_setup.c
index 1282c27cfcb7..af2a55e0b4e9 100644
--- a/arch/mips/nxp/pnx8550/stb810/board_setup.c
+++ b/arch/mips/nxp/pnx8550/stb810/board_setup.c
@@ -33,15 +33,7 @@
33 33
34void __init board_setup(void) 34void __init board_setup(void)
35{ 35{
36 unsigned long config0, configpr; 36 unsigned long configpr;
37
38 config0 = read_c0_config();
39
40 /* clear all three cache coherency fields */
41 config0 &= ~(0x7 | (7<<25) | (7<<28));
42 config0 |= (CONF_CM_DEFAULT | (CONF_CM_DEFAULT<<25) |
43 (CONF_CM_DEFAULT<<28));
44 write_c0_config(config0);
45 37
46 configpr = read_c0_config7(); 38 configpr = read_c0_config7();
47 configpr |= (1<<19); /* enable tlb */ 39 configpr |= (1<<19); /* enable tlb */