diff options
author | Jayachandran C <jchandra@broadcom.com> | 2013-12-21 06:22:25 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2014-01-24 16:39:49 -0500 |
commit | e7aa6c66b0acc34caba3af485f1a039bfa8aef07 (patch) | |
tree | 3a92465aff2febcefa2429e7d716a94d8f8a6e4f /arch/mips/netlogic | |
parent | 61673de131f9bf1bace63a5e58ab683a0e5313fd (diff) |
MIPS: Netlogic: XLP9XX bridge and DRAM code
Update bridge code. Add code to the XLP9XX registers for DRAM
size, limit and node when running on XLPXX
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6282/
Diffstat (limited to 'arch/mips/netlogic')
-rw-r--r-- | arch/mips/netlogic/xlp/nlm_hal.c | 26 |
1 files changed, 19 insertions, 7 deletions
diff --git a/arch/mips/netlogic/xlp/nlm_hal.c b/arch/mips/netlogic/xlp/nlm_hal.c index 61f325d06e95..efd64ac1f407 100644 --- a/arch/mips/netlogic/xlp/nlm_hal.c +++ b/arch/mips/netlogic/xlp/nlm_hal.c | |||
@@ -314,21 +314,33 @@ int xlp_get_dram_map(int n, uint64_t *dram_map) | |||
314 | { | 314 | { |
315 | uint64_t bridgebase, base, lim; | 315 | uint64_t bridgebase, base, lim; |
316 | uint32_t val; | 316 | uint32_t val; |
317 | unsigned int barreg, limreg, xlatreg; | ||
317 | int i, node, rv; | 318 | int i, node, rv; |
318 | 319 | ||
319 | /* Look only at mapping on Node 0, we don't handle crazy configs */ | 320 | /* Look only at mapping on Node 0, we don't handle crazy configs */ |
320 | bridgebase = nlm_get_bridge_regbase(0); | 321 | bridgebase = nlm_get_bridge_regbase(0); |
321 | rv = 0; | 322 | rv = 0; |
322 | for (i = 0; i < 8; i++) { | 323 | for (i = 0; i < 8; i++) { |
323 | val = nlm_read_bridge_reg(bridgebase, | 324 | if (cpu_is_xlp9xx()) { |
324 | BRIDGE_DRAM_NODE_TRANSLN(i)); | 325 | barreg = BRIDGE_9XX_DRAM_BAR(i); |
325 | node = (val >> 1) & 0x3; | 326 | limreg = BRIDGE_9XX_DRAM_LIMIT(i); |
326 | if (n >= 0 && n != node) | 327 | xlatreg = BRIDGE_9XX_DRAM_NODE_TRANSLN(i); |
327 | continue; | 328 | } else { |
328 | val = nlm_read_bridge_reg(bridgebase, BRIDGE_DRAM_BAR(i)); | 329 | barreg = BRIDGE_DRAM_BAR(i); |
330 | limreg = BRIDGE_DRAM_LIMIT(i); | ||
331 | xlatreg = BRIDGE_DRAM_NODE_TRANSLN(i); | ||
332 | } | ||
333 | if (n >= 0) { | ||
334 | /* node specified, get node mapping of BAR */ | ||
335 | val = nlm_read_bridge_reg(bridgebase, xlatreg); | ||
336 | node = (val >> 1) & 0x3; | ||
337 | if (n != node) | ||
338 | continue; | ||
339 | } | ||
340 | val = nlm_read_bridge_reg(bridgebase, barreg); | ||
329 | val = (val >> 12) & 0xfffff; | 341 | val = (val >> 12) & 0xfffff; |
330 | base = (uint64_t) val << 20; | 342 | base = (uint64_t) val << 20; |
331 | val = nlm_read_bridge_reg(bridgebase, BRIDGE_DRAM_LIMIT(i)); | 343 | val = nlm_read_bridge_reg(bridgebase, limreg); |
332 | val = (val >> 12) & 0xfffff; | 344 | val = (val >> 12) & 0xfffff; |
333 | if (val == 0) /* BAR not used */ | 345 | if (val == 0) /* BAR not used */ |
334 | continue; | 346 | continue; |