diff options
author | Jayachandran C <jchandra@broadcom.com> | 2012-10-31 08:01:39 -0400 |
---|---|---|
committer | John Crispin <blogic@openwrt.org> | 2012-11-09 05:37:19 -0500 |
commit | 77ae798f5b736dfdc692b86b393d9699052ac77a (patch) | |
tree | 040a68a1c544167364e4ca2b78e69179c397e4b2 /arch/mips/netlogic/xlr/wakeup.c | |
parent | 2a37b1ae443f20470a789b12a45cbc249c9e50a6 (diff) |
MIPS: Netlogic: Support for multi-chip configuration
Upto 4 Netlogic XLP SoCs can be connected over ICI links to form a
coherent multi-node system. Each SoC has its own set of on-chip
devices including PIC. To support this, add a per SoC stucture and
use it for the PIC and SYS block addresses instead of using global
variables.
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4469
Signed-off-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch/mips/netlogic/xlr/wakeup.c')
-rw-r--r-- | arch/mips/netlogic/xlr/wakeup.c | 21 |
1 files changed, 19 insertions, 2 deletions
diff --git a/arch/mips/netlogic/xlr/wakeup.c b/arch/mips/netlogic/xlr/wakeup.c index 0878924da153..3ebf7411d67b 100644 --- a/arch/mips/netlogic/xlr/wakeup.c +++ b/arch/mips/netlogic/xlr/wakeup.c | |||
@@ -33,6 +33,7 @@ | |||
33 | */ | 33 | */ |
34 | 34 | ||
35 | #include <linux/init.h> | 35 | #include <linux/init.h> |
36 | #include <linux/delay.h> | ||
36 | #include <linux/threads.h> | 37 | #include <linux/threads.h> |
37 | 38 | ||
38 | #include <asm/asm.h> | 39 | #include <asm/asm.h> |
@@ -50,18 +51,34 @@ | |||
50 | 51 | ||
51 | int __cpuinit xlr_wakeup_secondary_cpus(void) | 52 | int __cpuinit xlr_wakeup_secondary_cpus(void) |
52 | { | 53 | { |
53 | unsigned int i, boot_cpu; | 54 | struct nlm_soc_info *nodep; |
55 | unsigned int i, j, boot_cpu; | ||
54 | 56 | ||
55 | /* | 57 | /* |
56 | * In case of RMI boot, hit with NMI to get the cores | 58 | * In case of RMI boot, hit with NMI to get the cores |
57 | * from bootloader to linux code. | 59 | * from bootloader to linux code. |
58 | */ | 60 | */ |
61 | nodep = nlm_get_node(0); | ||
59 | boot_cpu = hard_smp_processor_id(); | 62 | boot_cpu = hard_smp_processor_id(); |
60 | nlm_set_nmi_handler(nlm_rmiboot_preboot); | 63 | nlm_set_nmi_handler(nlm_rmiboot_preboot); |
61 | for (i = 0; i < NR_CPUS; i++) { | 64 | for (i = 0; i < NR_CPUS; i++) { |
62 | if (i == boot_cpu || !cpumask_test_cpu(i, &nlm_cpumask)) | 65 | if (i == boot_cpu || !cpumask_test_cpu(i, &nlm_cpumask)) |
63 | continue; | 66 | continue; |
64 | nlm_pic_send_ipi(nlm_pic_base, i, 1, 1); /* send NMI */ | 67 | nlm_pic_send_ipi(nodep->picbase, i, 1, 1); /* send NMI */ |
68 | } | ||
69 | |||
70 | /* Fill up the coremask early */ | ||
71 | nodep->coremask = 1; | ||
72 | for (i = 1; i < NLM_CORES_PER_NODE; i++) { | ||
73 | for (j = 1000000; j > 0; j--) { | ||
74 | if (nlm_cpu_ready[i * NLM_THREADS_PER_CORE]) | ||
75 | break; | ||
76 | udelay(10); | ||
77 | } | ||
78 | if (j != 0) | ||
79 | nodep->coremask |= (1u << i); | ||
80 | else | ||
81 | pr_err("Failed to wakeup core %d\n", i); | ||
65 | } | 82 | } |
66 | 83 | ||
67 | return 0; | 84 | return 0; |