MIPS: Netlogic: Support for multi-chip configuration

Upto 4 Netlogic XLP SoCs can be connected over ICI links to form a
coherent multi-node system.  Each SoC has its own set of on-chip
devices including PIC.  To support this, add a per SoC stucture and
use it for the PIC and SYS block addresses instead of using global
variables.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4469
Signed-off-by: John Crispin <blogic@openwrt.org>

1 files changed, 14 insertions, 8 deletions

diff --git a/arch/mips/netlogic/xlp/wakeup.c b/arch/mips/netlogic/xlp/wakeup.c
index 88ce38d096f0..cb9010642ac3 100644
--- a/arch/mips/netlogic/xlp/wakeup.c
+++ b/arch/mips/netlogic/xlp/wakeup.c
@@ -79,32 +79,38 @@ static int xlp_wakeup_core(uint64_t sysbase, int core)
 
 static void xlp_enable_secondary_cores(const cpumask_t *wakeup_mask)
 {
-        uint64_t syspcibase, sysbase;
+        struct nlm_soc_info *nodep;
+        uint64_t syspcibase;
         uint32_t syscoremask;
-        int core, n;
+        int core, n, cpu;
 
-        for (n = 0; n < 4; n++) {
+        for (n = 0; n < NLM_NR_NODES; n++) {
                 syspcibase = nlm_get_sys_pcibase(n);
                 if (nlm_read_reg(syspcibase, 0) == 0xffffffff)
                         break;
 
                 /* read cores in reset from SYS and account for boot cpu */
-                sysbase = nlm_get_sys_regbase(n);
-                syscoremask = nlm_read_sys_reg(sysbase, SYS_CPU_RESET);
+                nlm_node_init(n);
+                nodep = nlm_get_node(n);
+                syscoremask = nlm_read_sys_reg(nodep->sysbase, SYS_CPU_RESET);
                 if (n == 0)
                         syscoremask |= 1;
 
-                for (core = 0; core < 8; core++) {
+                for (core = 0; core < NLM_CORES_PER_NODE; core++) {
                         /* see if the core exists */
                         if ((syscoremask & (1 << core)) == 0)
                                 continue;
 
                         /* see if at least the first thread is enabled */
-                        if (!cpumask_test_cpu((n * 8 + core) * 4, wakeup_mask))
+                        cpu = (n * NLM_CORES_PER_NODE + core)
+                                                * NLM_THREADS_PER_CORE;
+                        if (!cpumask_test_cpu(cpu, wakeup_mask))
                                 continue;
 
                         /* wake up the core */
-                        if (!xlp_wakeup_core(sysbase, core))
+                        if (xlp_wakeup_core(nodep->sysbase, core))
+                                nodep->coremask |= 1u << core;
+                        else
                                 pr_err("Failed to enable core %d\n", core);
                 }
         }