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authorGanesan Ramalingam <ganesanr@broadcom.com>2012-10-31 08:01:42 -0400
committerJohn Crispin <blogic@openwrt.org>2012-11-09 05:37:20 -0500
commited21cfe207276e2d2883173399dd0380db372e18 (patch)
tree99382401195a5163fc6fd2191d786034512aa874 /arch/mips/netlogic/common/irq.c
parent38541742da05f65d77e514a70bae9b84251c4bc4 (diff)
MIPS: Netlogic: Support for XLR/XLS Fast Message Network
On XLR/XLS, the cpu cores communicate with fast on-chip devices (e.g. network accelerator, security engine etc.) using the Fast Messaging Network(FMN). The FMN queues and credits needs to be configured and intialized before it can be used. The co-processor 2 on XLR/XLS CPU cores has registers for FMN access, and the XLR/XLS has custom instructions for sending and loading messages. The FMN can deliver also per-cpu interrupts when messages are available at the CPU. This patch adds FMN initialization, adds interrupt setup and handling, and also provides support for sending and receiving FMN messages. Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com> Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4468 Signed-off-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch/mips/netlogic/common/irq.c')
-rw-r--r--arch/mips/netlogic/common/irq.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/mips/netlogic/common/irq.c b/arch/mips/netlogic/common/irq.c
index b89d5a6b62cc..00dcc7a2bc5a 100644
--- a/arch/mips/netlogic/common/irq.c
+++ b/arch/mips/netlogic/common/irq.c
@@ -58,6 +58,7 @@
58#elif defined(CONFIG_CPU_XLR) 58#elif defined(CONFIG_CPU_XLR)
59#include <asm/netlogic/xlr/iomap.h> 59#include <asm/netlogic/xlr/iomap.h>
60#include <asm/netlogic/xlr/pic.h> 60#include <asm/netlogic/xlr/pic.h>
61#include <asm/netlogic/xlr/fmn.h>
61#else 62#else
62#error "Unknown CPU" 63#error "Unknown CPU"
63#endif 64#endif
@@ -68,8 +69,8 @@
68#else 69#else
69#define SMP_IRQ_MASK 0 70#define SMP_IRQ_MASK 0
70#endif 71#endif
71#define PERCPU_IRQ_MASK (SMP_IRQ_MASK | (1ull << IRQ_TIMER)) 72#define PERCPU_IRQ_MASK (SMP_IRQ_MASK | (1ull << IRQ_TIMER) | \
72 73 (1ull << IRQ_FMN))
73 74
74struct nlm_pic_irq { 75struct nlm_pic_irq {
75 void (*extra_ack)(struct irq_data *); 76 void (*extra_ack)(struct irq_data *);
@@ -241,6 +242,9 @@ void __init arch_init_irq(void)
241 nlm_init_percpu_irqs(); 242 nlm_init_percpu_irqs();
242 nlm_init_node_irqs(0); 243 nlm_init_node_irqs(0);
243 write_c0_eimr(nlm_current_node()->irqmask); 244 write_c0_eimr(nlm_current_node()->irqmask);
245#if defined(CONFIG_CPU_XLR)
246 nlm_setup_fmn_irq();
247#endif
244} 248}
245 249
246void nlm_smp_irq_init(int hwcpuid) 250void nlm_smp_irq_init(int hwcpuid)