diff options
author | Andrew Bresticker <abrestic@chromium.org> | 2014-09-18 17:47:12 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2014-11-24 01:44:53 -0500 |
commit | a669efc4a3b49de9226b280bb683f5b1d5a5d143 (patch) | |
tree | b4466902e1496aee220fbaf4dbf0be1f0247cf7e /arch/mips/mti-sead3/sead3-time.c | |
parent | 079a4601768e248ba89dd08d4953e6dae607d7bd (diff) |
MIPS: Add hook to get C0 performance counter interrupt
The hardware perf event driver and oprofile interpret the global
cp0_perfcount_irq differently: in the hardware perf event driver
it is an offset from MIPS_CPU_IRQ_BASE and in oprofile it is the
actual IRQ number. This still works most of the time since
MIPS_CPU_IRQ_BASE is usually 0, but is clearly wrong. Since the
performance counter interrupt may vary from platform to platform
like the C0 timer interrupt, add the optional get_c0_perfcount_int
hook which returns the IRQ number of the performance counter.
The hook should return < 0 if the performance counter interrupt is
shared with the timer. If the hook is not present, the CPU vector
reported in C0_IntCtl (cp0_perfcount_irq) is used.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Tested-by: Qais Yousef <qais.yousef@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7805/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mti-sead3/sead3-time.c')
-rw-r--r-- | arch/mips/mti-sead3/sead3-time.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/mips/mti-sead3/sead3-time.c b/arch/mips/mti-sead3/sead3-time.c index 678d03d53c60..f090c5177719 100644 --- a/arch/mips/mti-sead3/sead3-time.c +++ b/arch/mips/mti-sead3/sead3-time.c | |||
@@ -81,13 +81,16 @@ void read_persistent_clock(struct timespec *ts) | |||
81 | ts->tv_nsec = 0; | 81 | ts->tv_nsec = 0; |
82 | } | 82 | } |
83 | 83 | ||
84 | static void __init plat_perf_setup(void) | 84 | int get_c0_perfcount_int(void) |
85 | { | 85 | { |
86 | if (cp0_perfcount_irq >= 0) { | 86 | if (cp0_perfcount_irq >= 0) { |
87 | if (cpu_has_vint) | 87 | if (cpu_has_vint) |
88 | set_vi_handler(cp0_perfcount_irq, mips_perf_dispatch); | 88 | set_vi_handler(cp0_perfcount_irq, mips_perf_dispatch); |
89 | mips_cpu_perf_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq; | 89 | mips_cpu_perf_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq; |
90 | } else { | ||
91 | mips_cpu_perf_irq = -1; | ||
90 | } | 92 | } |
93 | return mips_cpu_perf_irq; | ||
91 | } | 94 | } |
92 | 95 | ||
93 | unsigned int get_c0_compare_int(void) | 96 | unsigned int get_c0_compare_int(void) |
@@ -108,6 +111,4 @@ void __init plat_time_init(void) | |||
108 | (est_freq % 1000000) * 100 / 1000000); | 111 | (est_freq % 1000000) * 100 / 1000000); |
109 | 112 | ||
110 | mips_scroll_message(); | 113 | mips_scroll_message(); |
111 | |||
112 | plat_perf_setup(); | ||
113 | } | 114 | } |