diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2013-01-22 06:59:30 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2013-02-01 04:00:22 -0500 |
commit | 7034228792cc561e79ff8600f02884bd4c80e287 (patch) | |
tree | 89b77af37d087d9de236fc5d21f60bf552d0a2c6 /arch/mips/mti-sead3/sead3-pic32-i2c-drv.c | |
parent | 405ab01c70e18058d9c01a1256769a61fc65413e (diff) |
MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mti-sead3/sead3-pic32-i2c-drv.c')
-rw-r--r-- | arch/mips/mti-sead3/sead3-pic32-i2c-drv.c | 58 |
1 files changed, 29 insertions, 29 deletions
diff --git a/arch/mips/mti-sead3/sead3-pic32-i2c-drv.c b/arch/mips/mti-sead3/sead3-pic32-i2c-drv.c index 514675ed0cde..b921e5ec507c 100644 --- a/arch/mips/mti-sead3/sead3-pic32-i2c-drv.c +++ b/arch/mips/mti-sead3/sead3-pic32-i2c-drv.c | |||
@@ -19,40 +19,40 @@ | |||
19 | #define PIC32_I2CxCONCLR 0x0004 | 19 | #define PIC32_I2CxCONCLR 0x0004 |
20 | #define PIC32_I2CxCONSET 0x0008 | 20 | #define PIC32_I2CxCONSET 0x0008 |
21 | #define PIC32_I2CxCONINV 0x000C | 21 | #define PIC32_I2CxCONINV 0x000C |
22 | #define I2CCON_ON (1<<15) | 22 | #define I2CCON_ON (1<<15) |
23 | #define I2CCON_FRZ (1<<14) | 23 | #define I2CCON_FRZ (1<<14) |
24 | #define I2CCON_SIDL (1<<13) | 24 | #define I2CCON_SIDL (1<<13) |
25 | #define I2CCON_SCLREL (1<<12) | 25 | #define I2CCON_SCLREL (1<<12) |
26 | #define I2CCON_STRICT (1<<11) | 26 | #define I2CCON_STRICT (1<<11) |
27 | #define I2CCON_A10M (1<<10) | 27 | #define I2CCON_A10M (1<<10) |
28 | #define I2CCON_DISSLW (1<<9) | 28 | #define I2CCON_DISSLW (1<<9) |
29 | #define I2CCON_SMEN (1<<8) | 29 | #define I2CCON_SMEN (1<<8) |
30 | #define I2CCON_GCEN (1<<7) | 30 | #define I2CCON_GCEN (1<<7) |
31 | #define I2CCON_STREN (1<<6) | 31 | #define I2CCON_STREN (1<<6) |
32 | #define I2CCON_ACKDT (1<<5) | 32 | #define I2CCON_ACKDT (1<<5) |
33 | #define I2CCON_ACKEN (1<<4) | 33 | #define I2CCON_ACKEN (1<<4) |
34 | #define I2CCON_RCEN (1<<3) | 34 | #define I2CCON_RCEN (1<<3) |
35 | #define I2CCON_PEN (1<<2) | 35 | #define I2CCON_PEN (1<<2) |
36 | #define I2CCON_RSEN (1<<1) | 36 | #define I2CCON_RSEN (1<<1) |
37 | #define I2CCON_SEN (1<<0) | 37 | #define I2CCON_SEN (1<<0) |
38 | 38 | ||
39 | #define PIC32_I2CxSTAT 0x0010 | 39 | #define PIC32_I2CxSTAT 0x0010 |
40 | #define PIC32_I2CxSTATCLR 0x0014 | 40 | #define PIC32_I2CxSTATCLR 0x0014 |
41 | #define PIC32_I2CxSTATSET 0x0018 | 41 | #define PIC32_I2CxSTATSET 0x0018 |
42 | #define PIC32_I2CxSTATINV 0x001C | 42 | #define PIC32_I2CxSTATINV 0x001C |
43 | #define I2CSTAT_ACKSTAT (1<<15) | 43 | #define I2CSTAT_ACKSTAT (1<<15) |
44 | #define I2CSTAT_TRSTAT (1<<14) | 44 | #define I2CSTAT_TRSTAT (1<<14) |
45 | #define I2CSTAT_BCL (1<<10) | 45 | #define I2CSTAT_BCL (1<<10) |
46 | #define I2CSTAT_GCSTAT (1<<9) | 46 | #define I2CSTAT_GCSTAT (1<<9) |
47 | #define I2CSTAT_ADD10 (1<<8) | 47 | #define I2CSTAT_ADD10 (1<<8) |
48 | #define I2CSTAT_IWCOL (1<<7) | 48 | #define I2CSTAT_IWCOL (1<<7) |
49 | #define I2CSTAT_I2COV (1<<6) | 49 | #define I2CSTAT_I2COV (1<<6) |
50 | #define I2CSTAT_DA (1<<5) | 50 | #define I2CSTAT_DA (1<<5) |
51 | #define I2CSTAT_P (1<<4) | 51 | #define I2CSTAT_P (1<<4) |
52 | #define I2CSTAT_S (1<<3) | 52 | #define I2CSTAT_S (1<<3) |
53 | #define I2CSTAT_RW (1<<2) | 53 | #define I2CSTAT_RW (1<<2) |
54 | #define I2CSTAT_RBF (1<<1) | 54 | #define I2CSTAT_RBF (1<<1) |
55 | #define I2CSTAT_TBF (1<<0) | 55 | #define I2CSTAT_TBF (1<<0) |
56 | 56 | ||
57 | #define PIC32_I2CxADD 0x0020 | 57 | #define PIC32_I2CxADD 0x0020 |
58 | #define PIC32_I2CxADDCLR 0x0024 | 58 | #define PIC32_I2CxADDCLR 0x0024 |