MIPS: SEAD3: Use generic plat_irq_dispatch

The generic plat_irq_dispatch provided in irq_cpu.c is sufficient for
dispatching interrupts on SEAD-3 in legacy and vectored interrupt modes.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Tested-by: Qais Yousef <qais.yousef@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7822/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 1 insertions, 22 deletions

diff --git a/arch/mips/mti-sead3/sead3-int.c b/arch/mips/mti-sead3/sead3-int.c
index cb06cd954a13..69ae185a76c5 100644
--- a/arch/mips/mti-sead3/sead3-int.c
+++ b/arch/mips/mti-sead3/sead3-int.c
@@ -22,32 +22,11 @@
 
 static unsigned long sead3_config_reg;
 
-asmlinkage void plat_irq_dispatch(void)
-{
-        unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
-        int irq;
-
-        irq = (fls(pending) - CAUSEB_IP - 1);
-        if (irq >= 0)
-                do_IRQ(MIPS_CPU_IRQ_BASE + irq);
-        else
-                spurious_interrupt();
-}
-
 void __init arch_init_irq(void)
 {
-        int i;
-
-        if (!cpu_has_veic) {
+        if (!cpu_has_veic)
                 mips_cpu_irq_init();
 
-                if (cpu_has_vint) {
-                        /* install generic handler */
-                        for (i = 0; i < 8; i++)
-                                set_vi_handler(i, plat_irq_dispatch);
-                }
-        }
-
         sead3_config_reg = (unsigned long)ioremap_nocache(SEAD_CONFIG_BASE,
                 SEAD_CONFIG_SIZE);
         gic_present = (REG32(sead3_config_reg) & SEAD_CONFIG_GIC_PRESENT_MSK) >>