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authorMarkos Chandras <markos.chandras@imgtec.com>2014-01-15 09:13:05 -0500
committerRalf Baechle <ralf@linux-mips.org>2014-03-26 18:09:20 -0400
commit3bdd8e6e09cd5e88b3fc8ceddf150976633f43c3 (patch)
treeb55caa61c71a34cb84aed9cabb3d2cc8dc233c06 /arch/mips/mti-malta
parente6ca4e5bf11466b5e9423a1e4ea51a8216c4b9b6 (diff)
MIPS: malta: malta-memory: Use the PHYS_OFFSET to build the memory map
PHYS_OFFSET is used to denote the physical start address of the first bank of RAM. When the Malta board is in EVA mode, the physical start address of RAM is shifted to 0x80000000 so it's necessary to use this macro in order to make the code EVA agnostic. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Diffstat (limited to 'arch/mips/mti-malta')
-rw-r--r--arch/mips/mti-malta/malta-memory.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/mips/mti-malta/malta-memory.c b/arch/mips/mti-malta/malta-memory.c
index cd0400802eb1..9235aee832c7 100644
--- a/arch/mips/mti-malta/malta-memory.c
+++ b/arch/mips/mti-malta/malta-memory.c
@@ -81,11 +81,11 @@ fw_memblock_t * __init fw_getmdesc(int eva)
81 memset(mdesc, 0, sizeof(mdesc)); 81 memset(mdesc, 0, sizeof(mdesc));
82 82
83 mdesc[0].type = fw_dontuse; 83 mdesc[0].type = fw_dontuse;
84 mdesc[0].base = 0x00000000; 84 mdesc[0].base = PHYS_OFFSET;
85 mdesc[0].size = 0x00001000; 85 mdesc[0].size = 0x00001000;
86 86
87 mdesc[1].type = fw_code; 87 mdesc[1].type = fw_code;
88 mdesc[1].base = 0x00001000; 88 mdesc[1].base = mdesc[0].base + 0x00001000UL;
89 mdesc[1].size = 0x000ef000; 89 mdesc[1].size = 0x000ef000;
90 90
91 /* 91 /*
@@ -96,17 +96,17 @@ fw_memblock_t * __init fw_getmdesc(int eva)
96 * devices. 96 * devices.
97 */ 97 */
98 mdesc[2].type = fw_dontuse; 98 mdesc[2].type = fw_dontuse;
99 mdesc[2].base = 0x000f0000; 99 mdesc[2].base = mdesc[0].base + 0x000f0000UL;
100 mdesc[2].size = 0x00010000; 100 mdesc[2].size = 0x00010000;
101 101
102 mdesc[3].type = fw_dontuse; 102 mdesc[3].type = fw_dontuse;
103 mdesc[3].base = 0x00100000; 103 mdesc[3].base = mdesc[0].base + 0x00100000UL;
104 mdesc[3].size = CPHYSADDR(PFN_ALIGN((unsigned long)&_end)) - 104 mdesc[3].size = CPHYSADDR(PFN_ALIGN((unsigned long)&_end)) -
105 mdesc[3].base; 105 0x00100000UL;
106 106
107 mdesc[4].type = fw_free; 107 mdesc[4].type = fw_free;
108 mdesc[4].base = CPHYSADDR(PFN_ALIGN(&_end)); 108 mdesc[4].base = mdesc[0].base + CPHYSADDR(PFN_ALIGN(&_end));
109 mdesc[4].size = memsize - mdesc[4].base; 109 mdesc[4].size = memsize - CPHYSADDR(mdesc[4].base);
110 110
111 return &mdesc[0]; 111 return &mdesc[0];
112} 112}