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authorAndrew Bresticker <abrestic@chromium.org>2014-10-20 15:03:48 -0400
committerRalf Baechle <ralf@linux-mips.org>2014-11-24 01:44:57 -0500
commit7d9ad5d8c3639113765a3a0ad78c18a736d9f494 (patch)
treea0d2cfa7058232cf750ce95188d7704c2a18f6fc /arch/mips/mti-malta/malta-time.c
parenta393d93059664f73d897d2a7e0c1ed85bf372954 (diff)
MIPS: Malta: Use gic_read_count() to read GIC timer
Instead of reading the GIC registers directly, use the interface the GIC driver already exposes for reading the global timer. Also get rid of the unnecessary #ifdefs. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8123/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mti-malta/malta-time.c')
-rw-r--r--arch/mips/mti-malta/malta-time.c14
1 files changed, 3 insertions, 11 deletions
diff --git a/arch/mips/mti-malta/malta-time.c b/arch/mips/mti-malta/malta-time.c
index f6ca8ea4d992..39f3902ed341 100644
--- a/arch/mips/mti-malta/malta-time.c
+++ b/arch/mips/mti-malta/malta-time.c
@@ -70,9 +70,7 @@ static void __init estimate_frequencies(void)
70{ 70{
71 unsigned long flags; 71 unsigned long flags;
72 unsigned int count, start; 72 unsigned int count, start;
73#ifdef CONFIG_MIPS_GIC 73 cycle_t giccount = 0, gicstart = 0;
74 unsigned int giccount = 0, gicstart = 0;
75#endif
76 74
77#if defined(CONFIG_KVM_GUEST) && CONFIG_KVM_GUEST_TIMER_FREQ 75#if defined(CONFIG_KVM_GUEST) && CONFIG_KVM_GUEST_TIMER_FREQ
78 mips_hpt_frequency = CONFIG_KVM_GUEST_TIMER_FREQ * 1000000; 76 mips_hpt_frequency = CONFIG_KVM_GUEST_TIMER_FREQ * 1000000;
@@ -87,32 +85,26 @@ static void __init estimate_frequencies(void)
87 85
88 /* Initialize counters. */ 86 /* Initialize counters. */
89 start = read_c0_count(); 87 start = read_c0_count();
90#ifdef CONFIG_MIPS_GIC
91 if (gic_present) 88 if (gic_present)
92 GICREAD(GIC_REG(SHARED, GIC_SH_COUNTER_31_00), gicstart); 89 gicstart = gic_read_count();
93#endif
94 90
95 /* Read counter exactly on falling edge of update flag. */ 91 /* Read counter exactly on falling edge of update flag. */
96 while (CMOS_READ(RTC_REG_A) & RTC_UIP); 92 while (CMOS_READ(RTC_REG_A) & RTC_UIP);
97 while (!(CMOS_READ(RTC_REG_A) & RTC_UIP)); 93 while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
98 94
99 count = read_c0_count(); 95 count = read_c0_count();
100#ifdef CONFIG_MIPS_GIC
101 if (gic_present) 96 if (gic_present)
102 GICREAD(GIC_REG(SHARED, GIC_SH_COUNTER_31_00), giccount); 97 giccount = gic_read_count();
103#endif
104 98
105 local_irq_restore(flags); 99 local_irq_restore(flags);
106 100
107 count -= start; 101 count -= start;
108 mips_hpt_frequency = count; 102 mips_hpt_frequency = count;
109 103
110#ifdef CONFIG_MIPS_GIC
111 if (gic_present) { 104 if (gic_present) {
112 giccount -= gicstart; 105 giccount -= gicstart;
113 gic_frequency = giccount; 106 gic_frequency = giccount;
114 } 107 }
115#endif
116} 108}
117 109
118void read_persistent_clock(struct timespec *ts) 110void read_persistent_clock(struct timespec *ts)