diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-29 16:44:45 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-29 16:44:45 -0400 |
commit | 8d231c11fd0b694c447e59e687754b6999eea0a2 (patch) | |
tree | b0b3c17efff7018bbf948e489f642c8079f33cc0 /arch/mips/momentum | |
parent | 1f1332f727c3229eb2166a83fec5d3de6a73dce2 (diff) | |
parent | 8db089c6b5594c961fb6bc6d613b9926e0d3d98f (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (33 commits)
[MIPS] Add missing backslashes to macro definitions.
[MIPS] Death list of board support to be removed after 2.6.18.
[MIPS] Remove BSD and Sys V compat data types.
[MIPS] ioc3.h: Uses u8, so include <linux/types.h>.
[MIPS] 74K: Assume it will also have an AR bit in config7
[MIPS] Treat CPUs with AR bit as physically indexed.
[MIPS] Oprofile: Support VSMP on 34K.
[MIPS] MIPS32/MIPS64 S-cache fix and cleanup
[MIPS] excite: PCI makefile needs to use += if it wants a chance to work.
[MIPS] excite: plat_setup -> plat_mem_setup.
[MIPS] au1xxx: export dbdma functions
[MIPS] au1xxx: dbdma, no sleeping under spin_lock
[MIPS] au1xxx: fix PSC_SMBTXRX_RSR.
[MIPS] Early printk for IP27.
[MIPS] Fix handling of 0 length I & D caches.
[MIPS] Typo fixes.
[MIPS] MIPS32/MIPS64 secondary cache management
[MIPS] Fix FIXADDR_TOP for TX39/TX49.
[MIPS] Remove first timer interrupt setup in wrppmc_timer_setup()
[MIPS] Fix configuration of R2 CPU features and multithreading.
...
Diffstat (limited to 'arch/mips/momentum')
-rw-r--r-- | arch/mips/momentum/jaguar_atx/setup.c | 4 | ||||
-rw-r--r-- | arch/mips/momentum/ocelot_c/setup.c | 4 | ||||
-rw-r--r-- | arch/mips/momentum/ocelot_g/setup.c | 4 |
3 files changed, 6 insertions, 6 deletions
diff --git a/arch/mips/momentum/jaguar_atx/setup.c b/arch/mips/momentum/jaguar_atx/setup.c index df1485501ce6..d0419480b097 100644 --- a/arch/mips/momentum/jaguar_atx/setup.c +++ b/arch/mips/momentum/jaguar_atx/setup.c | |||
@@ -370,8 +370,8 @@ void __init plat_mem_setup(void) | |||
370 | pm_power_off = momenco_jaguar_power_off; | 370 | pm_power_off = momenco_jaguar_power_off; |
371 | 371 | ||
372 | /* | 372 | /* |
373 | * initrd_start = (ulong)jaguar_initrd_start; | 373 | * initrd_start = (unsigned long)jaguar_initrd_start; |
374 | * initrd_end = (ulong)jaguar_initrd_start + (ulong)jaguar_initrd_size; | 374 | * initrd_end = (unsigned long)jaguar_initrd_start + (ulong)jaguar_initrd_size; |
375 | * initrd_below_start_ok = 1; | 375 | * initrd_below_start_ok = 1; |
376 | */ | 376 | */ |
377 | 377 | ||
diff --git a/arch/mips/momentum/ocelot_c/setup.c b/arch/mips/momentum/ocelot_c/setup.c index 257e1d1b72dd..a0ee006d75cf 100644 --- a/arch/mips/momentum/ocelot_c/setup.c +++ b/arch/mips/momentum/ocelot_c/setup.c | |||
@@ -242,8 +242,8 @@ void __init plat_mem_setup(void) | |||
242 | pm_power_off = momenco_ocelot_power_off; | 242 | pm_power_off = momenco_ocelot_power_off; |
243 | 243 | ||
244 | /* | 244 | /* |
245 | * initrd_start = (ulong)ocelot_initrd_start; | 245 | * initrd_start = (unsigned long)ocelot_initrd_start; |
246 | * initrd_end = (ulong)ocelot_initrd_start + (ulong)ocelot_initrd_size; | 246 | * initrd_end = (unsigned long)ocelot_initrd_start + (ulong)ocelot_initrd_size; |
247 | * initrd_below_start_ok = 1; | 247 | * initrd_below_start_ok = 1; |
248 | */ | 248 | */ |
249 | 249 | ||
diff --git a/arch/mips/momentum/ocelot_g/setup.c b/arch/mips/momentum/ocelot_g/setup.c index 72143ab1e900..39da02b4e076 100644 --- a/arch/mips/momentum/ocelot_g/setup.c +++ b/arch/mips/momentum/ocelot_g/setup.c | |||
@@ -174,8 +174,8 @@ void __init plat_mem_setup(void) | |||
174 | pm_power_off = momenco_ocelot_power_off; | 174 | pm_power_off = momenco_ocelot_power_off; |
175 | 175 | ||
176 | /* | 176 | /* |
177 | * initrd_start = (ulong)ocelot_initrd_start; | 177 | * initrd_start = (unsigned long)ocelot_initrd_start; |
178 | * initrd_end = (ulong)ocelot_initrd_start + (ulong)ocelot_initrd_size; | 178 | * initrd_end = (unsigned long)ocelot_initrd_start + (ulong)ocelot_initrd_size; |
179 | * initrd_below_start_ok = 1; | 179 | * initrd_below_start_ok = 1; |
180 | */ | 180 | */ |
181 | 181 | ||