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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2006-04-07 12:33:31 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-04-18 22:14:30 -0400
commit3c68da798a3facbf94d536b1ed7ff6f1e7f4ad8d (patch)
tree14882e68603070e2697f1825a17e6adc57b03d00 /arch/mips/mm
parent9200c0b2a07c430bd98c546fc44b94f50e67ac62 (diff)
[MIPS] Use __ffs() instead of ffs() for waybit calculation.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm')
-rw-r--r--arch/mips/mm/c-r4k.c16
-rw-r--r--arch/mips/mm/sc-rm7k.c2
2 files changed, 9 insertions, 9 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index d88c6686413a..4182e1176fae 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -750,12 +750,12 @@ static void __init probe_pcache(void)
750 icache_size = 1 << (12 + ((config & CONF_IC) >> 9)); 750 icache_size = 1 << (12 + ((config & CONF_IC) >> 9));
751 c->icache.linesz = 16 << ((config & CONF_IB) >> 5); 751 c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
752 c->icache.ways = 2; 752 c->icache.ways = 2;
753 c->icache.waybit = ffs(icache_size/2) - 1; 753 c->icache.waybit = __ffs(icache_size/2);
754 754
755 dcache_size = 1 << (12 + ((config & CONF_DC) >> 6)); 755 dcache_size = 1 << (12 + ((config & CONF_DC) >> 6));
756 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); 756 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
757 c->dcache.ways = 2; 757 c->dcache.ways = 2;
758 c->dcache.waybit= ffs(dcache_size/2) - 1; 758 c->dcache.waybit= __ffs(dcache_size/2);
759 759
760 c->options |= MIPS_CPU_CACHE_CDEX_P; 760 c->options |= MIPS_CPU_CACHE_CDEX_P;
761 break; 761 break;
@@ -838,12 +838,12 @@ static void __init probe_pcache(void)
838 icache_size = 1 << (10 + ((config & CONF_IC) >> 9)); 838 icache_size = 1 << (10 + ((config & CONF_IC) >> 9));
839 c->icache.linesz = 16 << ((config & CONF_IB) >> 5); 839 c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
840 c->icache.ways = 2; 840 c->icache.ways = 2;
841 c->icache.waybit = ffs(icache_size/2) - 1; 841 c->icache.waybit = __ffs(icache_size/2);
842 842
843 dcache_size = 1 << (10 + ((config & CONF_DC) >> 6)); 843 dcache_size = 1 << (10 + ((config & CONF_DC) >> 6));
844 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); 844 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
845 c->dcache.ways = 2; 845 c->dcache.ways = 2;
846 c->dcache.waybit = ffs(dcache_size/2) - 1; 846 c->dcache.waybit = __ffs(dcache_size/2);
847 847
848 c->options |= MIPS_CPU_CACHE_CDEX_P; 848 c->options |= MIPS_CPU_CACHE_CDEX_P;
849 break; 849 break;
@@ -874,12 +874,12 @@ static void __init probe_pcache(void)
874 icache_size = 1 << (12 + ((config & CONF_IC) >> 9)); 874 icache_size = 1 << (12 + ((config & CONF_IC) >> 9));
875 c->icache.linesz = 16 << ((config & CONF_IB) >> 5); 875 c->icache.linesz = 16 << ((config & CONF_IB) >> 5);
876 c->icache.ways = 4; 876 c->icache.ways = 4;
877 c->icache.waybit = ffs(icache_size / c->icache.ways) - 1; 877 c->icache.waybit = __ffs(icache_size / c->icache.ways);
878 878
879 dcache_size = 1 << (12 + ((config & CONF_DC) >> 6)); 879 dcache_size = 1 << (12 + ((config & CONF_DC) >> 6));
880 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); 880 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4);
881 c->dcache.ways = 4; 881 c->dcache.ways = 4;
882 c->dcache.waybit = ffs(dcache_size / c->dcache.ways) - 1; 882 c->dcache.waybit = __ffs(dcache_size / c->dcache.ways);
883 883
884#if !defined(CONFIG_SMP) || !defined(RM9000_CDEX_SMP_WAR) 884#if !defined(CONFIG_SMP) || !defined(RM9000_CDEX_SMP_WAR)
885 c->options |= MIPS_CPU_CACHE_CDEX_P; 885 c->options |= MIPS_CPU_CACHE_CDEX_P;
@@ -907,7 +907,7 @@ static void __init probe_pcache(void)
907 icache_size = c->icache.sets * 907 icache_size = c->icache.sets *
908 c->icache.ways * 908 c->icache.ways *
909 c->icache.linesz; 909 c->icache.linesz;
910 c->icache.waybit = ffs(icache_size/c->icache.ways) - 1; 910 c->icache.waybit = __ffs(icache_size/c->icache.ways);
911 911
912 if (config & 0x8) /* VI bit */ 912 if (config & 0x8) /* VI bit */
913 c->icache.flags |= MIPS_CACHE_VTAG; 913 c->icache.flags |= MIPS_CACHE_VTAG;
@@ -927,7 +927,7 @@ static void __init probe_pcache(void)
927 dcache_size = c->dcache.sets * 927 dcache_size = c->dcache.sets *
928 c->dcache.ways * 928 c->dcache.ways *
929 c->dcache.linesz; 929 c->dcache.linesz;
930 c->dcache.waybit = ffs(dcache_size/c->dcache.ways) - 1; 930 c->dcache.waybit = __ffs(dcache_size/c->dcache.ways);
931 931
932 c->options |= MIPS_CPU_PREFETCH; 932 c->options |= MIPS_CPU_PREFETCH;
933 break; 933 break;
diff --git a/arch/mips/mm/sc-rm7k.c b/arch/mips/mm/sc-rm7k.c
index 3b6cc9ba1b05..31ec73052423 100644
--- a/arch/mips/mm/sc-rm7k.c
+++ b/arch/mips/mm/sc-rm7k.c
@@ -138,7 +138,7 @@ void __init rm7k_sc_init(void)
138 138
139 c->scache.linesz = sc_lsize; 139 c->scache.linesz = sc_lsize;
140 c->scache.ways = 4; 140 c->scache.ways = 4;
141 c->scache.waybit= ffs(scache_size / c->scache.ways) - 1; 141 c->scache.waybit= __ffs(scache_size / c->scache.ways);
142 c->scache.waysize = scache_size / c->scache.ways; 142 c->scache.waysize = scache_size / c->scache.ways;
143 c->scache.sets = scache_size / (c->scache.linesz * c->scache.ways); 143 c->scache.sets = scache_size / (c->scache.linesz * c->scache.ways);
144 printk(KERN_INFO "Secondary cache size %dK, linesize %d bytes.\n", 144 printk(KERN_INFO "Secondary cache size %dK, linesize %d bytes.\n",