diff options
author | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2007-11-27 13:31:33 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2008-01-29 05:14:58 -0500 |
commit | c7c6b39050aed4af913c17970ebfb592bae757fc (patch) | |
tree | faaad45cd4b3ef2f582c6b47a5082e9eee2853fd /arch/mips/mm | |
parent | 930bff882296c02ca81db108672ef4ca06c37db5 (diff) |
[MIPS] Use correct dma flushing in dma_cache_sync()
Not cache coherent R10k systems (like IP28) need to do real cache
invalidates in dma_cache_sync().
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm')
-rw-r--r-- | arch/mips/mm/dma-default.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c index 810535dd091b..ae39dd88b9aa 100644 --- a/arch/mips/mm/dma-default.c +++ b/arch/mips/mm/dma-default.c | |||
@@ -383,7 +383,7 @@ void dma_cache_sync(struct device *dev, void *vaddr, size_t size, | |||
383 | BUG_ON(direction == DMA_NONE); | 383 | BUG_ON(direction == DMA_NONE); |
384 | 384 | ||
385 | if (!plat_device_is_coherent(dev)) | 385 | if (!plat_device_is_coherent(dev)) |
386 | dma_cache_wback_inv((unsigned long)vaddr, size); | 386 | __dma_sync((unsigned long)vaddr, size, direction); |
387 | } | 387 | } |
388 | 388 | ||
389 | EXPORT_SYMBOL(dma_cache_sync); | 389 | EXPORT_SYMBOL(dma_cache_sync); |