diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 18:46:15 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 18:46:15 -0400 |
commit | 49a89efbbbcc178a39555c43bd59a7593c429664 (patch) | |
tree | 93ab78ec340d3f2fe23f9f853edd0bd62dcc64bb /arch/mips/mm | |
parent | 10cc3529072d5415fb040018a8a99aa7a60190b6 (diff) |
[MIPS] Fix "no space between function name and open parenthesis" warnings.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm')
-rw-r--r-- | arch/mips/mm/c-r3k.c | 12 | ||||
-rw-r--r-- | arch/mips/mm/sc-mips.c | 2 | ||||
-rw-r--r-- | arch/mips/mm/tlb-r4k.c | 2 |
3 files changed, 8 insertions, 8 deletions
diff --git a/arch/mips/mm/c-r3k.c b/arch/mips/mm/c-r3k.c index 59868a1edf66..c55312f6fd3a 100644 --- a/arch/mips/mm/c-r3k.c +++ b/arch/mips/mm/c-r3k.c | |||
@@ -121,7 +121,7 @@ static void r3k_flush_icache_range(unsigned long start, unsigned long end) | |||
121 | write_c0_status((ST0_ISC|ST0_SWC|flags)&~ST0_IEC); | 121 | write_c0_status((ST0_ISC|ST0_SWC|flags)&~ST0_IEC); |
122 | 122 | ||
123 | for (i = 0; i < size; i += 0x080) { | 123 | for (i = 0; i < size; i += 0x080) { |
124 | asm ( "sb\t$0, 0x000(%0)\n\t" | 124 | asm( "sb\t$0, 0x000(%0)\n\t" |
125 | "sb\t$0, 0x004(%0)\n\t" | 125 | "sb\t$0, 0x004(%0)\n\t" |
126 | "sb\t$0, 0x008(%0)\n\t" | 126 | "sb\t$0, 0x008(%0)\n\t" |
127 | "sb\t$0, 0x00c(%0)\n\t" | 127 | "sb\t$0, 0x00c(%0)\n\t" |
@@ -178,7 +178,7 @@ static void r3k_flush_dcache_range(unsigned long start, unsigned long end) | |||
178 | write_c0_status((ST0_ISC|flags)&~ST0_IEC); | 178 | write_c0_status((ST0_ISC|flags)&~ST0_IEC); |
179 | 179 | ||
180 | for (i = 0; i < size; i += 0x080) { | 180 | for (i = 0; i < size; i += 0x080) { |
181 | asm ( "sb\t$0, 0x000(%0)\n\t" | 181 | asm( "sb\t$0, 0x000(%0)\n\t" |
182 | "sb\t$0, 0x004(%0)\n\t" | 182 | "sb\t$0, 0x004(%0)\n\t" |
183 | "sb\t$0, 0x008(%0)\n\t" | 183 | "sb\t$0, 0x008(%0)\n\t" |
184 | "sb\t$0, 0x00c(%0)\n\t" | 184 | "sb\t$0, 0x00c(%0)\n\t" |
@@ -217,8 +217,8 @@ static void r3k_flush_dcache_range(unsigned long start, unsigned long end) | |||
217 | write_c0_status(flags); | 217 | write_c0_status(flags); |
218 | } | 218 | } |
219 | 219 | ||
220 | static inline unsigned long get_phys_page (unsigned long addr, | 220 | static inline unsigned long get_phys_page(unsigned long addr, |
221 | struct mm_struct *mm) | 221 | struct mm_struct *mm) |
222 | { | 222 | { |
223 | pgd_t *pgd; | 223 | pgd_t *pgd; |
224 | pud_t *pud; | 224 | pud_t *pud; |
@@ -281,13 +281,13 @@ static void r3k_flush_cache_sigtramp(unsigned long addr) | |||
281 | write_c0_status(flags&~ST0_IEC); | 281 | write_c0_status(flags&~ST0_IEC); |
282 | 282 | ||
283 | /* Fill the TLB to avoid an exception with caches isolated. */ | 283 | /* Fill the TLB to avoid an exception with caches isolated. */ |
284 | asm ( "lw\t$0, 0x000(%0)\n\t" | 284 | asm( "lw\t$0, 0x000(%0)\n\t" |
285 | "lw\t$0, 0x004(%0)\n\t" | 285 | "lw\t$0, 0x004(%0)\n\t" |
286 | : : "r" (addr) ); | 286 | : : "r" (addr) ); |
287 | 287 | ||
288 | write_c0_status((ST0_ISC|ST0_SWC|flags)&~ST0_IEC); | 288 | write_c0_status((ST0_ISC|ST0_SWC|flags)&~ST0_IEC); |
289 | 289 | ||
290 | asm ( "sb\t$0, 0x000(%0)\n\t" | 290 | asm( "sb\t$0, 0x000(%0)\n\t" |
291 | "sb\t$0, 0x004(%0)\n\t" | 291 | "sb\t$0, 0x004(%0)\n\t" |
292 | : : "r" (addr) ); | 292 | : : "r" (addr) ); |
293 | 293 | ||
diff --git a/arch/mips/mm/sc-mips.c b/arch/mips/mm/sc-mips.c index 42b50964c644..c13170bc675c 100644 --- a/arch/mips/mm/sc-mips.c +++ b/arch/mips/mm/sc-mips.c | |||
@@ -102,7 +102,7 @@ static inline int __init mips_sc_probe(void) | |||
102 | 102 | ||
103 | int __init mips_sc_init(void) | 103 | int __init mips_sc_init(void) |
104 | { | 104 | { |
105 | int found = mips_sc_probe (); | 105 | int found = mips_sc_probe(); |
106 | if (found) { | 106 | if (found) { |
107 | mips_sc_enable(); | 107 | mips_sc_enable(); |
108 | bcops = &mips_sc_ops; | 108 | bcops = &mips_sc_ops; |
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c index dcd6913dc1ff..74ae0348cc92 100644 --- a/arch/mips/mm/tlb-r4k.c +++ b/arch/mips/mm/tlb-r4k.c | |||
@@ -491,7 +491,7 @@ void __init tlb_init(void) | |||
491 | int wired = current_cpu_data.tlbsize - ntlb; | 491 | int wired = current_cpu_data.tlbsize - ntlb; |
492 | write_c0_wired(wired); | 492 | write_c0_wired(wired); |
493 | write_c0_index(wired-1); | 493 | write_c0_index(wired-1); |
494 | printk ("Restricting TLB to %d entries\n", ntlb); | 494 | printk("Restricting TLB to %d entries\n", ntlb); |
495 | } else | 495 | } else |
496 | printk("Ignoring invalid argument ntlb=%d\n", ntlb); | 496 | printk("Ignoring invalid argument ntlb=%d\n", ntlb); |
497 | } | 497 | } |