diff options
author | Maciej W. Rozycki <macro@linux-mips.org> | 2005-04-01 12:53:33 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2005-10-29 14:31:00 -0400 |
commit | 202d0388e747d7e9b70fc0efc2a5637812b722c1 (patch) | |
tree | e584618abf815adac8de0c4951bc1058cc3c9c44 /arch/mips/mm | |
parent | 1b3a6e975cbe81c5abc55e4c1b9f5b5250c5f20e (diff) |
Remove useless casts. Fix formatting.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm')
-rw-r--r-- | arch/mips/mm/pg-sb1.c | 31 |
1 files changed, 19 insertions, 12 deletions
diff --git a/arch/mips/mm/pg-sb1.c b/arch/mips/mm/pg-sb1.c index 162bb155e695..148c65b9cd8b 100644 --- a/arch/mips/mm/pg-sb1.c +++ b/arch/mips/mm/pg-sb1.c | |||
@@ -60,7 +60,8 @@ static inline void clear_page_cpu(void *page) | |||
60 | " .set noreorder \n" | 60 | " .set noreorder \n" |
61 | #ifdef CONFIG_CPU_HAS_PREFETCH | 61 | #ifdef CONFIG_CPU_HAS_PREFETCH |
62 | " daddiu %0, %0, 128 \n" | 62 | " daddiu %0, %0, 128 \n" |
63 | " pref " SB1_PREF_STORE_STREAMED_HINT ", -128(%0) \n" /* Prefetch the first 4 lines */ | 63 | " pref " SB1_PREF_STORE_STREAMED_HINT ", -128(%0) \n" |
64 | /* Prefetch the first 4 lines */ | ||
64 | " pref " SB1_PREF_STORE_STREAMED_HINT ", -96(%0) \n" | 65 | " pref " SB1_PREF_STORE_STREAMED_HINT ", -96(%0) \n" |
65 | " pref " SB1_PREF_STORE_STREAMED_HINT ", -64(%0) \n" | 66 | " pref " SB1_PREF_STORE_STREAMED_HINT ", -64(%0) \n" |
66 | " pref " SB1_PREF_STORE_STREAMED_HINT ", -32(%0) \n" | 67 | " pref " SB1_PREF_STORE_STREAMED_HINT ", -32(%0) \n" |
@@ -106,7 +107,8 @@ static inline void copy_page_cpu(void *to, void *from) | |||
106 | #ifdef CONFIG_CPU_HAS_PREFETCH | 107 | #ifdef CONFIG_CPU_HAS_PREFETCH |
107 | " daddiu %0, %0, 128 \n" | 108 | " daddiu %0, %0, 128 \n" |
108 | " daddiu %1, %1, 128 \n" | 109 | " daddiu %1, %1, 128 \n" |
109 | " pref " SB1_PREF_LOAD_STREAMED_HINT ", -128(%0)\n" /* Prefetch the first 4 lines */ | 110 | " pref " SB1_PREF_LOAD_STREAMED_HINT ", -128(%0)\n" |
111 | /* Prefetch the first 4 lines */ | ||
110 | " pref " SB1_PREF_STORE_STREAMED_HINT ", -128(%1)\n" | 112 | " pref " SB1_PREF_STORE_STREAMED_HINT ", -128(%1)\n" |
111 | " pref " SB1_PREF_LOAD_STREAMED_HINT ", -96(%0)\n" | 113 | " pref " SB1_PREF_LOAD_STREAMED_HINT ", -96(%0)\n" |
112 | " pref " SB1_PREF_STORE_STREAMED_HINT ", -96(%1)\n" | 114 | " pref " SB1_PREF_STORE_STREAMED_HINT ", -96(%1)\n" |
@@ -207,15 +209,18 @@ typedef struct dmadscr_s { | |||
207 | u64 pad_b; | 209 | u64 pad_b; |
208 | } dmadscr_t; | 210 | } dmadscr_t; |
209 | 211 | ||
210 | static dmadscr_t page_descr[DM_NUM_CHANNELS] __attribute__((aligned(SMP_CACHE_BYTES))); | 212 | static dmadscr_t page_descr[DM_NUM_CHANNELS] |
213 | __attribute__((aligned(SMP_CACHE_BYTES))); | ||
211 | 214 | ||
212 | void sb1_dma_init(void) | 215 | void sb1_dma_init(void) |
213 | { | 216 | { |
214 | int i; | 217 | int i; |
215 | 218 | ||
216 | for (i = 0; i < DM_NUM_CHANNELS; i++) { | 219 | for (i = 0; i < DM_NUM_CHANNELS; i++) { |
217 | u64 base_val = (u64)CPHYSADDR(&page_descr[i]) | V_DM_DSCR_BASE_RINGSZ(1); | 220 | const u64 base_val = CPHYSADDR(&page_descr[i]) | |
218 | void *base_reg = (void *)IOADDR(A_DM_REGISTER(i, R_DM_DSCR_BASE)); | 221 | V_DM_DSCR_BASE_RINGSZ(1); |
222 | volatile void *base_reg = | ||
223 | IOADDR(A_DM_REGISTER(i, R_DM_DSCR_BASE)); | ||
219 | 224 | ||
220 | __raw_writeq(base_val, base_reg); | 225 | __raw_writeq(base_val, base_reg); |
221 | __raw_writeq(base_val | M_DM_DSCR_BASE_RESET, base_reg); | 226 | __raw_writeq(base_val | M_DM_DSCR_BASE_RESET, base_reg); |
@@ -225,14 +230,15 @@ void sb1_dma_init(void) | |||
225 | 230 | ||
226 | void clear_page(void *page) | 231 | void clear_page(void *page) |
227 | { | 232 | { |
228 | u64 to_phys = (u64)CPHYSADDR(page); | 233 | u64 to_phys = CPHYSADDR(page); |
229 | unsigned int cpu = smp_processor_id(); | 234 | unsigned int cpu = smp_processor_id(); |
230 | 235 | ||
231 | /* if the page is not in KSEG0, use old way */ | 236 | /* if the page is not in KSEG0, use old way */ |
232 | if ((long)KSEGX(page) != (long)CKSEG0) | 237 | if ((long)KSEGX(page) != (long)CKSEG0) |
233 | return clear_page_cpu(page); | 238 | return clear_page_cpu(page); |
234 | 239 | ||
235 | page_descr[cpu].dscr_a = to_phys | M_DM_DSCRA_ZERO_MEM | M_DM_DSCRA_L2C_DEST | M_DM_DSCRA_INTERRUPT; | 240 | page_descr[cpu].dscr_a = to_phys | M_DM_DSCRA_ZERO_MEM | |
241 | M_DM_DSCRA_L2C_DEST | M_DM_DSCRA_INTERRUPT; | ||
236 | page_descr[cpu].dscr_b = V_DM_DSCRB_SRC_LENGTH(PAGE_SIZE); | 242 | page_descr[cpu].dscr_b = V_DM_DSCRB_SRC_LENGTH(PAGE_SIZE); |
237 | __raw_writeq(1, IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_COUNT))); | 243 | __raw_writeq(1, IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_COUNT))); |
238 | 244 | ||
@@ -248,8 +254,8 @@ void clear_page(void *page) | |||
248 | 254 | ||
249 | void copy_page(void *to, void *from) | 255 | void copy_page(void *to, void *from) |
250 | { | 256 | { |
251 | u64 from_phys = (u64)CPHYSADDR(from); | 257 | u64 from_phys = CPHYSADDR(from); |
252 | u64 to_phys = (u64)CPHYSADDR(to); | 258 | u64 to_phys = CPHYSADDR(to); |
253 | unsigned int cpu = smp_processor_id(); | 259 | unsigned int cpu = smp_processor_id(); |
254 | 260 | ||
255 | /* if any page is not in KSEG0, use old way */ | 261 | /* if any page is not in KSEG0, use old way */ |
@@ -257,15 +263,16 @@ void copy_page(void *to, void *from) | |||
257 | || (long)KSEGX(from) != (long)CKSEG0) | 263 | || (long)KSEGX(from) != (long)CKSEG0) |
258 | return copy_page_cpu(to, from); | 264 | return copy_page_cpu(to, from); |
259 | 265 | ||
260 | page_descr[cpu].dscr_a = to_phys | M_DM_DSCRA_L2C_DEST | M_DM_DSCRA_INTERRUPT; | 266 | page_descr[cpu].dscr_a = to_phys | M_DM_DSCRA_L2C_DEST | |
267 | M_DM_DSCRA_INTERRUPT; | ||
261 | page_descr[cpu].dscr_b = from_phys | V_DM_DSCRB_SRC_LENGTH(PAGE_SIZE); | 268 | page_descr[cpu].dscr_b = from_phys | V_DM_DSCRB_SRC_LENGTH(PAGE_SIZE); |
262 | __raw_writeq(1, (void *)IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_COUNT))); | 269 | __raw_writeq(1, IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_COUNT))); |
263 | 270 | ||
264 | /* | 271 | /* |
265 | * Don't really want to do it this way, but there's no | 272 | * Don't really want to do it this way, but there's no |
266 | * reliable way to delay completion detection. | 273 | * reliable way to delay completion detection. |
267 | */ | 274 | */ |
268 | while (!(__raw_readq((void *)IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG))) | 275 | while (!(__raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG))) |
269 | & M_DM_DSCR_BASE_INTERRUPT)) | 276 | & M_DM_DSCR_BASE_INTERRUPT)) |
270 | ; | 277 | ; |
271 | __raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE))); | 278 | __raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE))); |