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authorMaciej W. Rozycki <macro@linux-mips.org>2005-02-22 16:51:30 -0500
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 14:30:44 -0400
commit65bda1a95d395c256818d1d8129487a4497b29d8 (patch)
tree57bea8a2593b17b987cbc188ecf07c341fda5dbc /arch/mips/mm
parent4912ba72d6e27d0f19ec062ffd00a8c0165a2f67 (diff)
Switch SiByte drivers back to __raw_*() functions.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm')
-rw-r--r--arch/mips/mm/pg-sb1.c28
1 files changed, 14 insertions, 14 deletions
diff --git a/arch/mips/mm/pg-sb1.c b/arch/mips/mm/pg-sb1.c
index 1b6df7133c1e..7a90ea383845 100644
--- a/arch/mips/mm/pg-sb1.c
+++ b/arch/mips/mm/pg-sb1.c
@@ -214,12 +214,12 @@ void sb1_dma_init(void)
214 int cpu = smp_processor_id(); 214 int cpu = smp_processor_id();
215 u64 base_val = CPHYSADDR(&page_descr[cpu]) | V_DM_DSCR_BASE_RINGSZ(1); 215 u64 base_val = CPHYSADDR(&page_descr[cpu]) | V_DM_DSCR_BASE_RINGSZ(1);
216 216
217 bus_writeq(base_val, 217 __raw_writeq(base_val,
218 (void *)IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE))); 218 IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
219 bus_writeq(base_val | M_DM_DSCR_BASE_RESET, 219 __raw_writeq(base_val | M_DM_DSCR_BASE_RESET,
220 (void *)IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE))); 220 IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
221 bus_writeq(base_val | M_DM_DSCR_BASE_ENABL, 221 __raw_writeq(base_val | M_DM_DSCR_BASE_ENABL,
222 (void *)IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE))); 222 IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
223} 223}
224 224
225void clear_page(void *page) 225void clear_page(void *page)
@@ -232,16 +232,16 @@ void clear_page(void *page)
232 232
233 page_descr[cpu].dscr_a = CPHYSADDR(page) | M_DM_DSCRA_ZERO_MEM | M_DM_DSCRA_L2C_DEST | M_DM_DSCRA_INTERRUPT; 233 page_descr[cpu].dscr_a = CPHYSADDR(page) | M_DM_DSCRA_ZERO_MEM | M_DM_DSCRA_L2C_DEST | M_DM_DSCRA_INTERRUPT;
234 page_descr[cpu].dscr_b = V_DM_DSCRB_SRC_LENGTH(PAGE_SIZE); 234 page_descr[cpu].dscr_b = V_DM_DSCRB_SRC_LENGTH(PAGE_SIZE);
235 bus_writeq(1, (void *)IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_COUNT))); 235 __raw_writeq(1, IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_COUNT)));
236 236
237 /* 237 /*
238 * Don't really want to do it this way, but there's no 238 * Don't really want to do it this way, but there's no
239 * reliable way to delay completion detection. 239 * reliable way to delay completion detection.
240 */ 240 */
241 while (!(bus_readq((void *)(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG)) & 241 while (!(__raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG)))
242 M_DM_DSCR_BASE_INTERRUPT)))) 242 M_DM_DSCR_BASE_INTERRUPT)))
243 ; 243 ;
244 bus_readq((void *)IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE))); 244 __raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
245} 245}
246 246
247void copy_page(void *to, void *from) 247void copy_page(void *to, void *from)
@@ -257,16 +257,16 @@ void copy_page(void *to, void *from)
257 257
258 page_descr[cpu].dscr_a = CPHYSADDR(to_phys) | M_DM_DSCRA_L2C_DEST | M_DM_DSCRA_INTERRUPT; 258 page_descr[cpu].dscr_a = CPHYSADDR(to_phys) | M_DM_DSCRA_L2C_DEST | M_DM_DSCRA_INTERRUPT;
259 page_descr[cpu].dscr_b = CPHYSADDR(from_phys) | V_DM_DSCRB_SRC_LENGTH(PAGE_SIZE); 259 page_descr[cpu].dscr_b = CPHYSADDR(from_phys) | V_DM_DSCRB_SRC_LENGTH(PAGE_SIZE);
260 bus_writeq(1, (void *)IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_COUNT))); 260 __raw_writeq(1, IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_COUNT)));
261 261
262 /* 262 /*
263 * Don't really want to do it this way, but there's no 263 * Don't really want to do it this way, but there's no
264 * reliable way to delay completion detection. 264 * reliable way to delay completion detection.
265 */ 265 */
266 while (!(bus_readq((void *)(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG)) & 266 while (!(__raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG)) &
267 M_DM_DSCR_BASE_INTERRUPT)))) 267 M_DM_DSCR_BASE_INTERRUPT)))
268 ; 268 ;
269 bus_readq((void *)IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE))); 269 __raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
270} 270}
271 271
272#else /* !CONFIG_SIBYTE_DMA_PAGEOPS */ 272#else /* !CONFIG_SIBYTE_DMA_PAGEOPS */