diff options
author | Steven J. Hill <Steven.Hill@imgtec.com> | 2013-03-25 13:15:55 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2013-05-09 11:55:18 -0400 |
commit | 2a0b24f56c2492b932f1aed617ae80fb23500d21 (patch) | |
tree | c9aec2872f912c65b83a92a66fe94f6006427d73 /arch/mips/mm | |
parent | 102cedc32a6e3cd537374a3678d407591d5a6fab (diff) |
MIPS: microMIPS: Add support for exception handling.
All exceptions must be taken in microMIPS mode, never in classic
MIPS mode or the kernel falls apart. A few NOP instructions are
used to maintain the correct alignment of microMIPS versions of
the exception vectors.
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Diffstat (limited to 'arch/mips/mm')
-rw-r--r-- | arch/mips/mm/tlbex.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index fb4ca9984ed1..0a68f2a4e690 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c | |||
@@ -2103,6 +2103,13 @@ static void __cpuinit build_r4000_tlb_load_handler(void) | |||
2103 | 2103 | ||
2104 | uasm_l_nopage_tlbl(&l, p); | 2104 | uasm_l_nopage_tlbl(&l, p); |
2105 | build_restore_work_registers(&p); | 2105 | build_restore_work_registers(&p); |
2106 | #ifdef CONFIG_CPU_MICROMIPS | ||
2107 | if ((unsigned long)tlb_do_page_fault_0 & 1) { | ||
2108 | uasm_i_lui(&p, K0, uasm_rel_hi((long)tlb_do_page_fault_0)); | ||
2109 | uasm_i_addiu(&p, K0, K0, uasm_rel_lo((long)tlb_do_page_fault_0)); | ||
2110 | uasm_i_jr(&p, K0); | ||
2111 | } else | ||
2112 | #endif | ||
2106 | uasm_i_j(&p, (unsigned long)tlb_do_page_fault_0 & 0x0fffffff); | 2113 | uasm_i_j(&p, (unsigned long)tlb_do_page_fault_0 & 0x0fffffff); |
2107 | uasm_i_nop(&p); | 2114 | uasm_i_nop(&p); |
2108 | 2115 | ||
@@ -2150,6 +2157,13 @@ static void __cpuinit build_r4000_tlb_store_handler(void) | |||
2150 | 2157 | ||
2151 | uasm_l_nopage_tlbs(&l, p); | 2158 | uasm_l_nopage_tlbs(&l, p); |
2152 | build_restore_work_registers(&p); | 2159 | build_restore_work_registers(&p); |
2160 | #ifdef CONFIG_CPU_MICROMIPS | ||
2161 | if ((unsigned long)tlb_do_page_fault_1 & 1) { | ||
2162 | uasm_i_lui(&p, K0, uasm_rel_hi((long)tlb_do_page_fault_1)); | ||
2163 | uasm_i_addiu(&p, K0, K0, uasm_rel_lo((long)tlb_do_page_fault_1)); | ||
2164 | uasm_i_jr(&p, K0); | ||
2165 | } else | ||
2166 | #endif | ||
2153 | uasm_i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff); | 2167 | uasm_i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff); |
2154 | uasm_i_nop(&p); | 2168 | uasm_i_nop(&p); |
2155 | 2169 | ||
@@ -2198,6 +2212,13 @@ static void __cpuinit build_r4000_tlb_modify_handler(void) | |||
2198 | 2212 | ||
2199 | uasm_l_nopage_tlbm(&l, p); | 2213 | uasm_l_nopage_tlbm(&l, p); |
2200 | build_restore_work_registers(&p); | 2214 | build_restore_work_registers(&p); |
2215 | #ifdef CONFIG_CPU_MICROMIPS | ||
2216 | if ((unsigned long)tlb_do_page_fault_1 & 1) { | ||
2217 | uasm_i_lui(&p, K0, uasm_rel_hi((long)tlb_do_page_fault_1)); | ||
2218 | uasm_i_addiu(&p, K0, K0, uasm_rel_lo((long)tlb_do_page_fault_1)); | ||
2219 | uasm_i_jr(&p, K0); | ||
2220 | } else | ||
2221 | #endif | ||
2201 | uasm_i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff); | 2222 | uasm_i_j(&p, (unsigned long)tlb_do_page_fault_1 & 0x0fffffff); |
2202 | uasm_i_nop(&p); | 2223 | uasm_i_nop(&p); |
2203 | 2224 | ||