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authorDavid Daney <ddaney@caviumnetworks.com>2009-05-08 18:10:50 -0400
committerRalf Baechle <ralf@linux-mips.org>2009-06-17 06:06:30 -0400
commitbd1437e49d80fa3369ffbea9e73cde7f6d69e550 (patch)
treeeaf4d6002b5640ab80ebc69348e1d5c7a80985b4 /arch/mips/mm
parent80ff0fd3ab6451407a20c19b80c1643c4a6d6434 (diff)
MIPS: Remove unused parameters from iPTE_LW.
The l parameter to iPTE_LW() is unused. Remove it and from some of its callers as well. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm')
-rw-r--r--arch/mips/mm/tlbex.c28
1 files changed, 14 insertions, 14 deletions
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 2104aa0fa3eb..62fbd0d89aeb 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -825,7 +825,7 @@ u32 handle_tlbs[FASTPATH_SIZE] __cacheline_aligned;
825u32 handle_tlbm[FASTPATH_SIZE] __cacheline_aligned; 825u32 handle_tlbm[FASTPATH_SIZE] __cacheline_aligned;
826 826
827static void __cpuinit 827static void __cpuinit
828iPTE_LW(u32 **p, struct uasm_label **l, unsigned int pte, unsigned int ptr) 828iPTE_LW(u32 **p, unsigned int pte, unsigned int ptr)
829{ 829{
830#ifdef CONFIG_SMP 830#ifdef CONFIG_SMP
831# ifdef CONFIG_64BIT_PHYS_ADDR 831# ifdef CONFIG_64BIT_PHYS_ADDR
@@ -905,13 +905,13 @@ iPTE_SW(u32 **p, struct uasm_reloc **r, unsigned int pte, unsigned int ptr,
905 * with it's original value. 905 * with it's original value.
906 */ 906 */
907static void __cpuinit 907static void __cpuinit
908build_pte_present(u32 **p, struct uasm_label **l, struct uasm_reloc **r, 908build_pte_present(u32 **p, struct uasm_reloc **r,
909 unsigned int pte, unsigned int ptr, enum label_id lid) 909 unsigned int pte, unsigned int ptr, enum label_id lid)
910{ 910{
911 uasm_i_andi(p, pte, pte, _PAGE_PRESENT | _PAGE_READ); 911 uasm_i_andi(p, pte, pte, _PAGE_PRESENT | _PAGE_READ);
912 uasm_i_xori(p, pte, pte, _PAGE_PRESENT | _PAGE_READ); 912 uasm_i_xori(p, pte, pte, _PAGE_PRESENT | _PAGE_READ);
913 uasm_il_bnez(p, r, pte, lid); 913 uasm_il_bnez(p, r, pte, lid);
914 iPTE_LW(p, l, pte, ptr); 914 iPTE_LW(p, pte, ptr);
915} 915}
916 916
917/* Make PTE valid, store result in PTR. */ 917/* Make PTE valid, store result in PTR. */
@@ -929,13 +929,13 @@ build_make_valid(u32 **p, struct uasm_reloc **r, unsigned int pte,
929 * restore PTE with value from PTR when done. 929 * restore PTE with value from PTR when done.
930 */ 930 */
931static void __cpuinit 931static void __cpuinit
932build_pte_writable(u32 **p, struct uasm_label **l, struct uasm_reloc **r, 932build_pte_writable(u32 **p, struct uasm_reloc **r,
933 unsigned int pte, unsigned int ptr, enum label_id lid) 933 unsigned int pte, unsigned int ptr, enum label_id lid)
934{ 934{
935 uasm_i_andi(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE); 935 uasm_i_andi(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE);
936 uasm_i_xori(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE); 936 uasm_i_xori(p, pte, pte, _PAGE_PRESENT | _PAGE_WRITE);
937 uasm_il_bnez(p, r, pte, lid); 937 uasm_il_bnez(p, r, pte, lid);
938 iPTE_LW(p, l, pte, ptr); 938 iPTE_LW(p, pte, ptr);
939} 939}
940 940
941/* Make PTE writable, update software status bits as well, then store 941/* Make PTE writable, update software status bits as well, then store
@@ -956,12 +956,12 @@ build_make_write(u32 **p, struct uasm_reloc **r, unsigned int pte,
956 * restore PTE with value from PTR when done. 956 * restore PTE with value from PTR when done.
957 */ 957 */
958static void __cpuinit 958static void __cpuinit
959build_pte_modifiable(u32 **p, struct uasm_label **l, struct uasm_reloc **r, 959build_pte_modifiable(u32 **p, struct uasm_reloc **r,
960 unsigned int pte, unsigned int ptr, enum label_id lid) 960 unsigned int pte, unsigned int ptr, enum label_id lid)
961{ 961{
962 uasm_i_andi(p, pte, pte, _PAGE_WRITE); 962 uasm_i_andi(p, pte, pte, _PAGE_WRITE);
963 uasm_il_beqz(p, r, pte, lid); 963 uasm_il_beqz(p, r, pte, lid);
964 iPTE_LW(p, l, pte, ptr); 964 iPTE_LW(p, pte, ptr);
965} 965}
966 966
967/* 967/*
@@ -1037,7 +1037,7 @@ static void __cpuinit build_r3000_tlb_load_handler(void)
1037 memset(relocs, 0, sizeof(relocs)); 1037 memset(relocs, 0, sizeof(relocs));
1038 1038
1039 build_r3000_tlbchange_handler_head(&p, K0, K1); 1039 build_r3000_tlbchange_handler_head(&p, K0, K1);
1040 build_pte_present(&p, &l, &r, K0, K1, label_nopage_tlbl); 1040 build_pte_present(&p, &r, K0, K1, label_nopage_tlbl);
1041 uasm_i_nop(&p); /* load delay */ 1041 uasm_i_nop(&p); /* load delay */
1042 build_make_valid(&p, &r, K0, K1); 1042 build_make_valid(&p, &r, K0, K1);
1043 build_r3000_tlb_reload_write(&p, &l, &r, K0, K1); 1043 build_r3000_tlb_reload_write(&p, &l, &r, K0, K1);
@@ -1067,7 +1067,7 @@ static void __cpuinit build_r3000_tlb_store_handler(void)
1067 memset(relocs, 0, sizeof(relocs)); 1067 memset(relocs, 0, sizeof(relocs));
1068 1068
1069 build_r3000_tlbchange_handler_head(&p, K0, K1); 1069 build_r3000_tlbchange_handler_head(&p, K0, K1);
1070 build_pte_writable(&p, &l, &r, K0, K1, label_nopage_tlbs); 1070 build_pte_writable(&p, &r, K0, K1, label_nopage_tlbs);
1071 uasm_i_nop(&p); /* load delay */ 1071 uasm_i_nop(&p); /* load delay */
1072 build_make_write(&p, &r, K0, K1); 1072 build_make_write(&p, &r, K0, K1);
1073 build_r3000_tlb_reload_write(&p, &l, &r, K0, K1); 1073 build_r3000_tlb_reload_write(&p, &l, &r, K0, K1);
@@ -1097,7 +1097,7 @@ static void __cpuinit build_r3000_tlb_modify_handler(void)
1097 memset(relocs, 0, sizeof(relocs)); 1097 memset(relocs, 0, sizeof(relocs));
1098 1098
1099 build_r3000_tlbchange_handler_head(&p, K0, K1); 1099 build_r3000_tlbchange_handler_head(&p, K0, K1);
1100 build_pte_modifiable(&p, &l, &r, K0, K1, label_nopage_tlbm); 1100 build_pte_modifiable(&p, &r, K0, K1, label_nopage_tlbm);
1101 uasm_i_nop(&p); /* load delay */ 1101 uasm_i_nop(&p); /* load delay */
1102 build_make_write(&p, &r, K0, K1); 1102 build_make_write(&p, &r, K0, K1);
1103 build_r3000_pte_reload_tlbwi(&p, K0, K1); 1103 build_r3000_pte_reload_tlbwi(&p, K0, K1);
@@ -1139,7 +1139,7 @@ build_r4000_tlbchange_handler_head(u32 **p, struct uasm_label **l,
1139#ifdef CONFIG_SMP 1139#ifdef CONFIG_SMP
1140 uasm_l_smp_pgtable_change(l, *p); 1140 uasm_l_smp_pgtable_change(l, *p);
1141#endif 1141#endif
1142 iPTE_LW(p, l, pte, ptr); /* get even pte */ 1142 iPTE_LW(p, pte, ptr); /* get even pte */
1143 if (!m4kc_tlbp_war()) 1143 if (!m4kc_tlbp_war())
1144 build_tlb_probe_entry(p); 1144 build_tlb_probe_entry(p);
1145} 1145}
@@ -1181,7 +1181,7 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
1181 } 1181 }
1182 1182
1183 build_r4000_tlbchange_handler_head(&p, &l, &r, K0, K1); 1183 build_r4000_tlbchange_handler_head(&p, &l, &r, K0, K1);
1184 build_pte_present(&p, &l, &r, K0, K1, label_nopage_tlbl); 1184 build_pte_present(&p, &r, K0, K1, label_nopage_tlbl);
1185 if (m4kc_tlbp_war()) 1185 if (m4kc_tlbp_war())
1186 build_tlb_probe_entry(&p); 1186 build_tlb_probe_entry(&p);
1187 build_make_valid(&p, &r, K0, K1); 1187 build_make_valid(&p, &r, K0, K1);
@@ -1212,7 +1212,7 @@ static void __cpuinit build_r4000_tlb_store_handler(void)
1212 memset(relocs, 0, sizeof(relocs)); 1212 memset(relocs, 0, sizeof(relocs));
1213 1213
1214 build_r4000_tlbchange_handler_head(&p, &l, &r, K0, K1); 1214 build_r4000_tlbchange_handler_head(&p, &l, &r, K0, K1);
1215 build_pte_writable(&p, &l, &r, K0, K1, label_nopage_tlbs); 1215 build_pte_writable(&p, &r, K0, K1, label_nopage_tlbs);
1216 if (m4kc_tlbp_war()) 1216 if (m4kc_tlbp_war())
1217 build_tlb_probe_entry(&p); 1217 build_tlb_probe_entry(&p);
1218 build_make_write(&p, &r, K0, K1); 1218 build_make_write(&p, &r, K0, K1);
@@ -1243,7 +1243,7 @@ static void __cpuinit build_r4000_tlb_modify_handler(void)
1243 memset(relocs, 0, sizeof(relocs)); 1243 memset(relocs, 0, sizeof(relocs));
1244 1244
1245 build_r4000_tlbchange_handler_head(&p, &l, &r, K0, K1); 1245 build_r4000_tlbchange_handler_head(&p, &l, &r, K0, K1);
1246 build_pte_modifiable(&p, &l, &r, K0, K1, label_nopage_tlbm); 1246 build_pte_modifiable(&p, &r, K0, K1, label_nopage_tlbm);
1247 if (m4kc_tlbp_war()) 1247 if (m4kc_tlbp_war())
1248 build_tlb_probe_entry(&p); 1248 build_tlb_probe_entry(&p);
1249 /* Present and writable bits set, set accessed and dirty bits. */ 1249 /* Present and writable bits set, set accessed and dirty bits. */