MIPS: Alchemy: unify CPU model constants.

This patch removes the various CPU_AU1??? model constants in favor of
a single CPU_ALCHEMY one.

All currently existing Alchemy models are identical in terms of cpu
core and cache size/organization.  The parts of the mips kernel which
need to know the exact CPU revision extract it from the c0_prid register
already; and finally nothing else in-tree depends on those any more.

Should a new variant with slightly different "company options" and/or
"processor revision" bits in c0_prid appear, it will be supported
immediately (minus an exact model string in cpuinfo).

Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 1 insertions, 7 deletions

diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index f335cf6cdd78..122c9c12e75a 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -292,13 +292,7 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l,
         case CPU_R4300:
         case CPU_5KC:
         case CPU_TX49XX:
-        case CPU_AU1000:
-        case CPU_AU1100:
-        case CPU_AU1500:
-        case CPU_AU1550:
-        case CPU_AU1200:
-        case CPU_AU1210:
-        case CPU_AU1250:
+        case CPU_ALCHEMY:
         case CPU_PR4450:
                 uasm_i_nop(p);
                 tlbw(p);