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authorManuel Lauss <mano@roarinelk.homelinux.net>2007-12-06 03:07:55 -0500
committerRalf Baechle <ralf@linux-mips.org>2008-01-29 05:14:59 -0500
commit237cfee1db66147aef4457f02b56a41e6f84bfd3 (patch)
tree75560d951a0a18184040d03184b9d4b2cff20f02 /arch/mips/mm/tlbex.c
parentc5ec1983e45d25446a023e98207e30ab1bf2311a (diff)
[MIPS] Alchemy: Au1210/Au1250 CPU support
This patch adds IDs for new Au1200 variants: Au1210 and Au1250. They are essentially identical to the Au1200 except for the Au1210 which has a different SoC-ID in the PRId register [bits 31:24]. The Au1250 is a "Au1200 V0.2". Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm/tlbex.c')
-rw-r--r--arch/mips/mm/tlbex.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index c298344fcb71..d026302e0ecc 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -917,6 +917,8 @@ static void __init build_tlb_write_entry(u32 **p, struct label **l,
917 case CPU_AU1500: 917 case CPU_AU1500:
918 case CPU_AU1550: 918 case CPU_AU1550:
919 case CPU_AU1200: 919 case CPU_AU1200:
920 case CPU_AU1210:
921 case CPU_AU1250:
920 case CPU_PR4450: 922 case CPU_PR4450:
921 i_nop(p); 923 i_nop(p);
922 tlbw(p); 924 tlbw(p);