[MIPS] Fix loads of section missmatches

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 4 insertions, 4 deletions

diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index 2ad08fca598b..63065d6e8063 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -388,7 +388,7 @@ void __init add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
  * lifetime of the system
  */
 
-static int temp_tlb_entry __initdata;
+static int temp_tlb_entry __cpuinitdata;
 
 __init int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
                                unsigned long entryhi, unsigned long pagemask)
@@ -427,7 +427,7 @@ out:
         return ret;
 }
 
-static void __init probe_tlb(unsigned long config)
+static void __cpuinit probe_tlb(unsigned long config)
 {
         struct cpuinfo_mips *c = &current_cpu_data;
         unsigned int reg;
@@ -455,7 +455,7 @@ static void __init probe_tlb(unsigned long config)
         c->tlbsize = ((reg >> 25) & 0x3f) + 1;
 }
 
-static int __initdata ntlb = 0;
+static int __cpuinitdata ntlb = 0;
 static int __init set_ntlb(char *str)
 {
         get_option(&str, &ntlb);
@@ -464,7 +464,7 @@ static int __init set_ntlb(char *str)
 
 __setup("ntlb=", set_ntlb);
 
-void __init tlb_init(void)
+void __cpuinit tlb_init(void)
 {
         unsigned int config = read_c0_config();