diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
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committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/mips/mm/sc-r5k.c |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'arch/mips/mm/sc-r5k.c')
-rw-r--r-- | arch/mips/mm/sc-r5k.c | 108 |
1 files changed, 108 insertions, 0 deletions
diff --git a/arch/mips/mm/sc-r5k.c b/arch/mips/mm/sc-r5k.c new file mode 100644 index 000000000000..d35b6c1103a3 --- /dev/null +++ b/arch/mips/mm/sc-r5k.c | |||
@@ -0,0 +1,108 @@ | |||
1 | /* | ||
2 | * Copyright (C) 1997, 2001 Ralf Baechle (ralf@gnu.org), | ||
3 | * derived from r4xx0.c by David S. Miller (dm@engr.sgi.com). | ||
4 | */ | ||
5 | #include <linux/init.h> | ||
6 | #include <linux/kernel.h> | ||
7 | #include <linux/sched.h> | ||
8 | #include <linux/mm.h> | ||
9 | |||
10 | #include <asm/mipsregs.h> | ||
11 | #include <asm/bcache.h> | ||
12 | #include <asm/cacheops.h> | ||
13 | #include <asm/page.h> | ||
14 | #include <asm/pgtable.h> | ||
15 | #include <asm/system.h> | ||
16 | #include <asm/mmu_context.h> | ||
17 | #include <asm/r4kcache.h> | ||
18 | |||
19 | /* Secondary cache size in bytes, if present. */ | ||
20 | static unsigned long scache_size; | ||
21 | |||
22 | #define SC_LINE 32 | ||
23 | #define SC_PAGE (128*SC_LINE) | ||
24 | |||
25 | static inline void blast_r5000_scache(void) | ||
26 | { | ||
27 | unsigned long start = INDEX_BASE; | ||
28 | unsigned long end = start + scache_size; | ||
29 | |||
30 | while(start < end) { | ||
31 | cache_op(R5K_Page_Invalidate_S, start); | ||
32 | start += SC_PAGE; | ||
33 | } | ||
34 | } | ||
35 | |||
36 | static void r5k_dma_cache_inv_sc(unsigned long addr, unsigned long size) | ||
37 | { | ||
38 | unsigned long end, a; | ||
39 | |||
40 | /* Catch bad driver code */ | ||
41 | BUG_ON(size == 0); | ||
42 | |||
43 | if (size >= scache_size) { | ||
44 | blast_r5000_scache(); | ||
45 | return; | ||
46 | } | ||
47 | |||
48 | /* On the R5000 secondary cache we cannot | ||
49 | * invalidate less than a page at a time. | ||
50 | * The secondary cache is physically indexed, write-through. | ||
51 | */ | ||
52 | a = addr & ~(SC_PAGE - 1); | ||
53 | end = (addr + size - 1) & ~(SC_PAGE - 1); | ||
54 | while (a <= end) { | ||
55 | cache_op(R5K_Page_Invalidate_S, a); | ||
56 | a += SC_PAGE; | ||
57 | } | ||
58 | } | ||
59 | |||
60 | static void r5k_sc_enable(void) | ||
61 | { | ||
62 | unsigned long flags; | ||
63 | |||
64 | local_irq_save(flags); | ||
65 | set_c0_config(R5K_CONF_SE); | ||
66 | blast_r5000_scache(); | ||
67 | local_irq_restore(flags); | ||
68 | } | ||
69 | |||
70 | static void r5k_sc_disable(void) | ||
71 | { | ||
72 | unsigned long flags; | ||
73 | |||
74 | local_irq_save(flags); | ||
75 | blast_r5000_scache(); | ||
76 | clear_c0_config(R5K_CONF_SE); | ||
77 | local_irq_restore(flags); | ||
78 | } | ||
79 | |||
80 | static inline int __init r5k_sc_probe(void) | ||
81 | { | ||
82 | unsigned long config = read_c0_config(); | ||
83 | |||
84 | if (config & CONF_SC) | ||
85 | return(0); | ||
86 | |||
87 | scache_size = (512 * 1024) << ((config & R5K_CONF_SS) >> 20); | ||
88 | |||
89 | printk("R5000 SCACHE size %ldkB, linesize 32 bytes.\n", | ||
90 | scache_size >> 10); | ||
91 | |||
92 | return 1; | ||
93 | } | ||
94 | |||
95 | static struct bcache_ops r5k_sc_ops = { | ||
96 | .bc_enable = r5k_sc_enable, | ||
97 | .bc_disable = r5k_sc_disable, | ||
98 | .bc_wback_inv = r5k_dma_cache_inv_sc, | ||
99 | .bc_inv = r5k_dma_cache_inv_sc | ||
100 | }; | ||
101 | |||
102 | void __init r5k_sc_init(void) | ||
103 | { | ||
104 | if (r5k_sc_probe()) { | ||
105 | r5k_sc_enable(); | ||
106 | bcops = &r5k_sc_ops; | ||
107 | } | ||
108 | } | ||