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authorRalf Baechle <ralf@linux-mips.org>2008-03-08 04:56:28 -0500
committerRalf Baechle <ralf@linux-mips.org>2008-03-12 10:14:41 -0400
commit234fcd1484a66158b561b36b421547f0ab85fee9 (patch)
treeb63fbb134fd673e1713f0462e6e0642b418da616 /arch/mips/mm/pg-r4k.c
parent1af0eea21431bed5d07dffc0fefab57fd72f7e90 (diff)
[MIPS] Fix loads of section missmatches
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm/pg-r4k.c')
-rw-r--r--arch/mips/mm/pg-r4k.c22
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/mips/mm/pg-r4k.c b/arch/mips/mm/pg-r4k.c
index 9185fbf37c0d..455dedb5b39e 100644
--- a/arch/mips/mm/pg-r4k.c
+++ b/arch/mips/mm/pg-r4k.c
@@ -66,21 +66,21 @@ EXPORT_SYMBOL(copy_page);
66 * with 64-bit kernels. The prefetch offsets have been experimentally tuned 66 * with 64-bit kernels. The prefetch offsets have been experimentally tuned
67 * an Origin 200. 67 * an Origin 200.
68 */ 68 */
69static int pref_offset_clear __initdata = 512; 69static int pref_offset_clear __cpuinitdata = 512;
70static int pref_offset_copy __initdata = 256; 70static int pref_offset_copy __cpuinitdata = 256;
71 71
72static unsigned int pref_src_mode __initdata; 72static unsigned int pref_src_mode __cpuinitdata;
73static unsigned int pref_dst_mode __initdata; 73static unsigned int pref_dst_mode __cpuinitdata;
74 74
75static int load_offset __initdata; 75static int load_offset __cpuinitdata;
76static int store_offset __initdata; 76static int store_offset __cpuinitdata;
77 77
78static unsigned int __initdata *dest, *epc; 78static unsigned int __cpuinitdata *dest, *epc;
79 79
80static unsigned int instruction_pending; 80static unsigned int instruction_pending;
81static union mips_instruction delayed_mi; 81static union mips_instruction delayed_mi;
82 82
83static void __init emit_instruction(union mips_instruction mi) 83static void __cpuinit emit_instruction(union mips_instruction mi)
84{ 84{
85 if (instruction_pending) 85 if (instruction_pending)
86 *epc++ = delayed_mi.word; 86 *epc++ = delayed_mi.word;
@@ -222,7 +222,7 @@ static inline void build_cdex_p(void)
222 emit_instruction(mi); 222 emit_instruction(mi);
223} 223}
224 224
225static void __init __build_store_reg(int reg) 225static void __cpuinit __build_store_reg(int reg)
226{ 226{
227 union mips_instruction mi; 227 union mips_instruction mi;
228 unsigned int width; 228 unsigned int width;
@@ -339,7 +339,7 @@ static inline void build_jr_ra(void)
339 flush_delay_slot_or_nop(); 339 flush_delay_slot_or_nop();
340} 340}
341 341
342void __init build_clear_page(void) 342void __cpuinit build_clear_page(void)
343{ 343{
344 unsigned int loop_start; 344 unsigned int loop_start;
345 unsigned long off; 345 unsigned long off;
@@ -442,7 +442,7 @@ dest = label();
442 pr_debug("\t.set pop\n"); 442 pr_debug("\t.set pop\n");
443} 443}
444 444
445void __init build_copy_page(void) 445void __cpuinit build_copy_page(void)
446{ 446{
447 unsigned int loop_start; 447 unsigned int loop_start;
448 unsigned long off; 448 unsigned long off;