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author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-02-27 19:19:22 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-02-27 19:19:22 -0500 |
commit | f1dd6ad599732fc89f36fdd65a2c2cf3c63a8711 (patch) | |
tree | 5092207128e47cba99dc0fe373fff6a36f4cb4b8 /arch/mips/mm/init.c | |
parent | 8d37a371b6869920e6c40c495c68eabba1ef3909 (diff) | |
parent | e10b234b3c4e255d3300a486c4ac15b43253ac6d (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (141 commits)
MIPS: Alchemy: defconfig updates
MIPS: Alchemy: Fix Au1100 ethernet build failure
MIPS: Alchemy: Repair db1500/bosporus builds
MIPS: ARC: Cleanup unused definitions from sgialib.h
MIPS: Cobalt: convert legacy port addresses to GT-64111 bus addresses
MIPS: Alchemy: use 36bit addresses for PCMCIA resources.
MIPS: Cobalt: Fix theoretical port aliasing issue
MIPS: Use ALIGN(x, bytes) instead of __ALIGN_MASK(x, bytes - 1)
MIPS: Crazy spinlock speed test.
MIPS: Optimize spinlocks.
MIPS: Alchemy: devboard PM needs to save CPLD registers.
MIPS: PowerTV: Eliminate duplicate opcode definition macros
MIPS: Lemote 2F: Move printks out of port_access_lock.
MIPS: PNX833x: Convert IRQ controller locks to raw spinlocks.
MIPS: Octeon: Replace spinlock with raw_spinlocks in dma-octeon.c.
MIPS: Octeon: Replace rwlocks in irq_chip handlers with raw_spinlocks.
MIPS: Octeon: Convert octeon_irq_msi_lock to raw spinlock.
MIPS: Loongson: Remove pointless sample_lock from oprofile code.
MIPS: SNI: Convert sni_rm200_i8259A_lock to raw spinlock.
MIPS: i8259: Convert IRQ controller lock to raw spinlock.
...
Diffstat (limited to 'arch/mips/mm/init.c')
-rw-r--r-- | arch/mips/mm/init.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index 1651942f7feb..f34c26439a32 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c | |||
@@ -143,7 +143,7 @@ void *kmap_coherent(struct page *page, unsigned long addr) | |||
143 | #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) | 143 | #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) |
144 | entrylo = pte.pte_high; | 144 | entrylo = pte.pte_high; |
145 | #else | 145 | #else |
146 | entrylo = pte_val(pte) >> 6; | 146 | entrylo = pte_to_entrylo(pte_val(pte)); |
147 | #endif | 147 | #endif |
148 | 148 | ||
149 | ENTER_CRITICAL(flags); | 149 | ENTER_CRITICAL(flags); |
@@ -477,7 +477,7 @@ unsigned long pgd_current[NR_CPUS]; | |||
477 | * will officially be retired. | 477 | * will officially be retired. |
478 | */ | 478 | */ |
479 | pgd_t swapper_pg_dir[_PTRS_PER_PGD] __page_aligned(_PGD_ORDER); | 479 | pgd_t swapper_pg_dir[_PTRS_PER_PGD] __page_aligned(_PGD_ORDER); |
480 | #ifdef CONFIG_64BIT | 480 | #ifndef __PAGETABLE_PMD_FOLDED |
481 | pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned(PMD_ORDER); | 481 | pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned(PMD_ORDER); |
482 | #endif | 482 | #endif |
483 | pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned(PTE_ORDER); | 483 | pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned(PTE_ORDER); |